CVSROOT:        /cvs
Module name:    src
Changes by:     [email protected] 2014/07/12 08:37:17

Modified files:
        sys/arch/octeon/dev: octhci.c 

Log message:
I don't need to treat the (half-)empty Tx and Rx FIFO cases.

Only the DMA-challenged host controllers need to, so don't panic!

While at it add some more debug messages when the interrupt returns 0.

Reply via email to