CVSROOT: /cvs Module name: src Changes by: v...@cvs.openbsd.org 2015/09/25 22:37:18
Modified files: sys/arch/octeon/dev: octeon_intr.c sys/arch/sgi/xbow: xheart.c Log message: xheart_splx() has to restore the interrupt mask even on secondary CPUs because each core has a separate mask. Otherwise the IPI can be left disabled accidentally on a non-primary CPU when the core uses the rendezvous mutex: 1. splraise(IPL_IPI) soft-masks the IPI. 2. An IPI hits and the CPU enters the interrupt handler. 3. The handler hard-masks the IPI. 4. The interrupt is not processed because of the CPU's current IPL. The IPI is left hard-masked on leaving the handler. 5. splx(s) lowers the IPL below IPL_IPI. However, the interrupt's hardware mask is left unchanged because of the CPU_IS_PRIMARY() check in xheart_splx(). After this, the system will eventually hang because the CPU does not respond to IPI requests of other cores. While here, fix a similar situation with CIU interrupts on octeon. This might save a few moments of debugging once non-primary CPUs are allowed to process CIU interrupts. ok miod@