CVSROOT: /cvs Module name: src Changes by: v...@cvs.openbsd.org 2017/10/11 08:24:12
Modified files:
sys/arch/mips64/mips64: cache_octeon.c
Log message:
Try to make CPU cache size values more correct, especially on OCTEON II
and III. The logic does not look nice, but the parameters do not follow
the standard config register layout anyway.
Remove unnecessary default values, and assume that the Config1
and Config2 registers are available on every CPU.
Tested on CN5020, CN6120, CN7130 and CN7360.
