On 10 Jun, David S. Miller wrote:
> Date: Thu, 10 Jun 1999 12:14:10 -0400 (EDT)
> From: [EMAIL PROTECTED]
>
> Notice the difference in the command buffer. (The second column of
> values; the first column is the address). I'm at a loss to explain
> it. Please let me know if you can duplicate these results.
>
> Place "flush_cache_all()" after writes to the command buffer, before
> you give the address to the chip, does this change things?
No.
> Also what kind of CPU is in the SS20? SuperSparc? If so, with or
> without MXCC (info can be found in /proc/cpuinfo).
No MXCC. Here's the /proc/cpuinfo:
cpu : Texas Instruments, Inc. - SuperSparc 50
fpu : SuperSparc on-chip FPU
promlib : Version 3 Revision 2
prom : 2.15
type : sun4m
ncpus probed : 2
ncpus active : 1
BogoMips : 49.86
MMU type : TI Viking
invall : 0
invmm : 0
invrnge : 0
invpg : 0
contexts : 65536
> It looks like a cache coherency problem to me.
I don't know. Why do the printk's and KGDB show the words being
zero'ed out? The CPU should be at least able to keep coherency with
itself, right?
And does sparc_dvma_malloc() arrange for the pages to be uncached?
--
-bwb
Brent Baccala
[EMAIL PROTECTED]
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