Correct SPI clock frequency division factor rounding, preventing clock rates 
higher than the maximum specified clock frequency being used. 

Signed-off-by: Ernst Schwab <[email protected]>
---
Tested on MPC8314.

diff -up linux-2.6.33-rc8.orig/drivers/spi/spi_mpc8xxx.c 
linux-2.6.33-rc8/drivers/spi/spi_mpc8xxx.c
--- linux-2.6.33-rc8.orig/drivers/spi/spi_mpc8xxx.c     2010-02-12 
20:07:45.000000000 +0100
+++ linux-2.6.33-rc8/drivers/spi/spi_mpc8xxx.c  2010-02-15 14:08:33.000000000 
+0100
@@ -365,7 +365,7 @@ int mpc8xxx_spi_setup_transfer(struct sp
 
        if ((mpc8xxx_spi->spibrg / hz) > 64) {
                cs->hw_mode |= SPMODE_DIV16;
-               pm = mpc8xxx_spi->spibrg / (hz * 64);
+               pm = (mpc8xxx_spi->spibrg - 1) / (hz * 64) + 1;
 
                WARN_ONCE(pm > 16, "%s: Requested speed is too low: %d Hz. "
                          "Will use %d Hz instead.\n", dev_name(&spi->dev),
@@ -373,7 +373,7 @@ int mpc8xxx_spi_setup_transfer(struct sp
                if (pm > 16)
                        pm = 16;
        } else
-               pm = mpc8xxx_spi->spibrg / (hz * 4);
+               pm = (mpc8xxx_spi->spibrg - 1) / (hz * 4) + 1;
        if (pm)
                pm--;
 


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