the bitrig patrick_rpi2 branch has been created by patrick. it is 0 commits behind master, and 3 commits ahead.
commit 524e1acf2eed98889a8b620f722f0aaf6f94fb24 diff: https://github.com/bitrig/bitrig/commit/524e1ac author: Patrick Wildt <[email protected]> date: Mon Feb 16 23:12:22 2015 +0100 pl011: some 'improvements' With the FIFO off we can't just write 32 characters and think we're done. Instead we need to do it char by char. Not sure if there's a better way... M sys/arch/armv7/virt/pl011.c commit 29bce9a5acf746a85c45e740b7c00bcedd1aae5f diff: https://github.com/bitrig/bitrig/commit/29bce9a author: Patrick Wildt <[email protected]> date: Fri Feb 6 00:31:10 2015 +0100 Initial raspberry Pi 2 support. * Support for interrupt controller. * Simple "bootloader" code. * Some changes to attach agtimer/pl011. * Disable pl011 FIFO. TODO: * debugging A sys/arch/armv7/armv7/rpi.S A sys/arch/armv7/broadcom/bcm2836_intr.c A sys/arch/armv7/broadcom/files.broadcom M sys/arch/armv7/conf/Makefile.armv7 M sys/arch/armv7/conf/files.armv7 M sys/arch/armv7/conf/generic A sys/arch/armv7/conf/generic.broadcom M sys/arch/armv7/virt/pl011.c commit 0b69754d9ce223e858de605e0dd39b8a4a9a455a diff: https://github.com/bitrig/bitrig/commit/0b69754 author: Patrick Wildt <[email protected]> date: Tue Feb 10 19:10:21 2015 +0100 arm: prototype of more MI intr_establish Before this diff we had the issue that we * needed to somehow get the irq nr from the DT node * needed to call establish on the correct interrupt controller This diff intends to solve theses issues. The idea is that you only need to call an "MI" interrupt establish function and it takes care of letting the correct interrupt controller now what interrupt to establish. This is implemented by adding a hook, so that interrupt controller can register them as interrupt controllers. When the device driver calls establish using the DT node, the code will look up the device's interrupt controller and look for that one in the list. Once found, it will call the IC's establish function and pass the device node further down. The IC code will take care to properly read and interpret the interrupt information and actually establish the interrupt. M sys/arch/arm/cortex/agtimer.c M sys/arch/arm/cortex/ampintc.c M sys/arch/armv7/armv7/intr.c M sys/arch/armv7/include/intr.h M sys/arch/armv7/virt/virtio_mmio.c
