This is a note to let you know that I've just added the patch titled
ARM: 6864/1: hw_breakpoint: clear DBGVCR out of reset
to the 2.6.38-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
arm-6864-1-hw_breakpoint-clear-dbgvcr-out-of-reset.patch
and it can be found in the queue-2.6.38 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree,
please let <[email protected]> know about it.
>From e89c0d7090c54d7b11b9b091e495a1ae345dd3ff Mon Sep 17 00:00:00 2001
From: Will Deacon <[email protected]>
Date: Tue, 5 Apr 2011 13:57:53 +0100
Subject: ARM: 6864/1: hw_breakpoint: clear DBGVCR out of reset
From: Will Deacon <[email protected]>
commit e89c0d7090c54d7b11b9b091e495a1ae345dd3ff upstream.
The DBGVCR, used for configuring vector catch debug events, is UNKNOWN
out of reset on ARMv7. When enabling monitor mode, this must be zeroed
to avoid UNPREDICTABLE behaviour.
This patch adds the zeroing code to the debug reset path.
Reported-by: Stepan Moskovchenko <[email protected]>
Signed-off-by: Will Deacon <[email protected]>
Signed-off-by: Russell King <[email protected]>
Signed-off-by: Greg Kroah-Hartman <[email protected]>
---
arch/arm/kernel/hw_breakpoint.c | 7 +++++++
1 file changed, 7 insertions(+)
--- a/arch/arm/kernel/hw_breakpoint.c
+++ b/arch/arm/kernel/hw_breakpoint.c
@@ -868,6 +868,13 @@ static void reset_ctrl_regs(void *info)
*/
asm volatile("mcr p14, 0, %0, c1, c0, 4" : : "r" (0));
isb();
+
+ /*
+ * Clear any configured vector-catch events before
+ * enabling monitor mode.
+ */
+ asm volatile("mcr p14, 0, %0, c0, c7, 0" : : "r" (0));
+ isb();
}
if (enable_monitor_mode())
Patches currently in stable-queue which might be from [email protected] are
queue-2.6.38/arm-6864-1-hw_breakpoint-clear-dbgvcr-out-of-reset.patch
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