From: Carolyn Wyborny <carolyn.wybo...@intel.com>
Register writes followed by a delay are required to have a flush
before the delay in order to commit the values to the register. Without
the flush, the code following the delay may not function correctly.
Reported-by: Tong Ho <tong...@ericsson.com>
Reported-by: Guenter Roeck <guenter.ro...@ericsson.com>
Signed-off-by: Carolyn Wyborny <carolyn.wybo...@intel.com>
Tested-by: Aaron Brown <aaron.f.br...@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirs...@intel.com>
---
Please apply to 2.6.32+. Upstream commit is
064b43304ed8ede8e13ff7b4338d09fd37bcffb1.
Thanks,
Guenter
drivers/net/igb/e1000_82575.c | 1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/drivers/net/igb/e1000_82575.c b/drivers/net/igb/e1000_82575.c
index 0f563c8..493e331 100644
--- a/drivers/net/igb/e1000_82575.c
+++ b/drivers/net/igb/e1000_82575.c
@@ -1735,6 +1735,7 @@ static s32 igb_reset_hw_82580(struct e1000_hw *hw)
ctrl |= E1000_CTRL_RST;
wr32(E1000_CTRL, ctrl);
+ wrfl();
/* Add delay to insure DEV_RST has time to complete */
if (global_device_reset)
----- End forwarded message -----
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