This is a note to let you know that I've just added the patch titled
intel/iommu: force writebuffer-flush quirk on Gen 4 Chipsets
to the 3.4-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
intel-iommu-force-writebuffer-flush-quirk-on-gen-4-chipsets.patch
and it can be found in the queue-3.4 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@vger.kernel.org> know about it.
>From 210561ffd72d00eccf12c0131b8024d5436bae95 Mon Sep 17 00:00:00 2001
From: Daniel Vetter <daniel.vet...@ffwll.ch>
Date: Mon, 21 Jan 2013 19:48:59 +0100
Subject: intel/iommu: force writebuffer-flush quirk on Gen 4 Chipsets
From: Daniel Vetter <daniel.vet...@ffwll.ch>
commit 210561ffd72d00eccf12c0131b8024d5436bae95 upstream.
We already have the quirk entry for the mobile platform, but also
reports on some desktop versions. So be paranoid and set it
everywhere.
References:
http://www.mail-archive.com/dri-devel@lists.freedesktop.org/msg33138.html
Reported-and-tested-by: Mihai Moldovan <io...@ionic.de>
Cc: David Woodhouse <dw...@infradead.org>
Cc: "Sankaran, Rajesh" <rajesh.sanka...@intel.com>
Signed-off-by: Daniel Vetter <daniel.vet...@ffwll.ch>
Signed-off-by: Greg Kroah-Hartman <gre...@linuxfoundation.org>
---
drivers/iommu/intel-iommu.c | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)
--- a/drivers/iommu/intel-iommu.c
+++ b/drivers/iommu/intel-iommu.c
@@ -4212,13 +4212,19 @@ static void __devinit quirk_iommu_rwbf(s
{
/*
* Mobile 4 Series Chipset neglects to set RWBF capability,
- * but needs it:
+ * but needs it. Same seems to hold for the desktop versions.
*/
printk(KERN_INFO "DMAR: Forcing write-buffer flush capability\n");
rwbf_quirk = 1;
}
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2a40, quirk_iommu_rwbf);
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e00, quirk_iommu_rwbf);
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e10, quirk_iommu_rwbf);
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e20, quirk_iommu_rwbf);
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e30, quirk_iommu_rwbf);
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e40, quirk_iommu_rwbf);
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e90, quirk_iommu_rwbf);
#define GGC 0x52
#define GGC_MEMORY_SIZE_MASK (0xf << 8)
Patches currently in stable-queue which might be from daniel.vet...@ffwll.ch are
queue-3.4/intel-iommu-force-writebuffer-flush-quirk-on-gen-4-chipsets.patch
queue-3.4/drm-fill-depth-bits_per_pixel-for-c8-format.patch
queue-3.4/drm-use-c8-instead-of-rgb332-when-determining-the-format-from-depth-bpp.patch
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