This is a note to let you know that I've just added the patch titled
clk: samsung: exynos5250: Add MDMA0 clocks
to the 3.12-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
clk-samsung-exynos5250-add-mdma0-clocks.patch
and it can be found in the queue-3.12 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree,
please let <[email protected]> know about it.
>From 8fb9aeb7a71ef4f3e0613d459a2e1366a7a90469 Mon Sep 17 00:00:00 2001
From: Abhilash Kesavan <[email protected]>
Date: Thu, 12 Dec 2013 08:32:01 +0530
Subject: clk: samsung: exynos5250: Add MDMA0 clocks
From: Abhilash Kesavan <[email protected]>
commit 8fb9aeb7a71ef4f3e0613d459a2e1366a7a90469 upstream.
Adds gate clock for MDMA0 on Exynos5250 SoC. This is needed to ensure
that the clock is enabled when MDMA0 is used on systems on which
firmware gates the clockby default.
Signed-off-by: Abhilash Kesavan <[email protected]>
Acked-by: Mike Turquette <[email protected]>
[t.figa: Updated patch description.]
Signed-off-by: Tomasz Figa <[email protected]>
Signed-off-by: Greg Kroah-Hartman <[email protected]>
---
Documentation/devicetree/bindings/clock/exynos5250-clock.txt | 2 ++
drivers/clk/samsung/clk-exynos5250.c | 5 ++++-
2 files changed, 6 insertions(+), 1 deletion(-)
--- a/Documentation/devicetree/bindings/clock/exynos5250-clock.txt
+++ b/Documentation/devicetree/bindings/clock/exynos5250-clock.txt
@@ -159,6 +159,8 @@ clock which they consume.
mixer 343
hdmi 344
g2d 345
+ mdma0 346
+ smmu_mdma0 347
[Clock Muxes]
--- a/drivers/clk/samsung/clk-exynos5250.c
+++ b/drivers/clk/samsung/clk-exynos5250.c
@@ -120,7 +120,8 @@ enum exynos5250_clks {
spi2, i2s1, i2s2, pcm1, pcm2, pwm, spdif, ac97, hsi2c0, hsi2c1, hsi2c2,
hsi2c3, chipid, sysreg, pmu, cmu_top, cmu_core, cmu_mem, tzpc0, tzpc1,
tzpc2, tzpc3, tzpc4, tzpc5, tzpc6, tzpc7, tzpc8, tzpc9, hdmi_cec, mct,
- wdt, rtc, tmu, fimd1, mie1, dsim0, dp, mixer, hdmi, g2d,
+ wdt, rtc, tmu, fimd1, mie1, dsim0, dp, mixer, hdmi, g2d, mdma0,
+ smmu_mdma0,
/* mux clocks */
mout_hdmi = 1024,
@@ -492,6 +493,8 @@ static struct samsung_gate_clock exynos5
GATE(mixer, "mixer", "mout_aclk200_disp1", GATE_IP_DISP1, 5, 0, 0),
GATE(hdmi, "hdmi", "mout_aclk200_disp1", GATE_IP_DISP1, 6, 0, 0),
GATE(g2d, "g2d", "aclk200", GATE_IP_ACP, 3, 0, 0),
+ GATE(mdma0, "mdma0", "aclk266", GATE_IP_ACP, 1, 0, 0),
+ GATE(smmu_mdma0, "smmu_mdma0", "aclk266", GATE_IP_ACP, 5, 0, 0),
};
static struct samsung_pll_rate_table vpll_24mhz_tbl[] __initdata = {
Patches currently in stable-queue which might be from [email protected] are
queue-3.12/arm-dts-exynos5250-fix-mdma0-clock-number.patch
queue-3.12/clk-samsung-exynos5250-add-clk_ignore_unused-flag-for-the-sysreg-clock.patch
queue-3.12/clk-samsung-exynos5250-add-mdma0-clocks.patch
queue-3.12/clk-samsung-exynos5250-fix-acp-gate-register-offset.patch
--
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