This is a note to let you know that I've just added the patch titled
drm/radeon/cik: use POLL_REG_MEM special op for sDMA HDP
to the 3.13-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
drm-radeon-cik-use-poll_reg_mem-special-op-for-sdma-hdp.patch
and it can be found in the queue-3.13 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree,
please let <[email protected]> know about it.
>From da9e07e6f53eaac4e838bc8c987d87c5769be724 Mon Sep 17 00:00:00 2001
From: Alex Deucher <[email protected]>
Date: Thu, 9 Jan 2014 16:35:39 -0500
Subject: drm/radeon/cik: use POLL_REG_MEM special op for sDMA HDP
flush
From: Alex Deucher <[email protected]>
commit da9e07e6f53eaac4e838bc8c987d87c5769be724 upstream.
This is the preferred flushing method on CIK.
Signed-off-by: Alex Deucher <[email protected]>
Cc: Tom Stellard <[email protected]>
Signed-off-by: Greg Kroah-Hartman <[email protected]>
---
drivers/gpu/drm/radeon/cik_sdma.c | 20 ++++++++++++++------
1 file changed, 14 insertions(+), 6 deletions(-)
--- a/drivers/gpu/drm/radeon/cik_sdma.c
+++ b/drivers/gpu/drm/radeon/cik_sdma.c
@@ -99,13 +99,21 @@ static void cik_sdma_hdp_flush_ring_emit
int ridx)
{
struct radeon_ring *ring = &rdev->ring[ridx];
+ u32 extra_bits = (SDMA_POLL_REG_MEM_EXTRA_OP(1) |
+ SDMA_POLL_REG_MEM_EXTRA_FUNC(3)); /* == */
+ u32 ref_and_mask;
- /* We should be using the new POLL_REG_MEM special op packet here
- * but it causes sDMA to hang sometimes
- */
- radeon_ring_write(ring, SDMA_PACKET(SDMA_OPCODE_SRBM_WRITE, 0, 0xf000));
- radeon_ring_write(ring, HDP_MEM_COHERENCY_FLUSH_CNTL >> 2);
- radeon_ring_write(ring, 0);
+ if (ridx == R600_RING_TYPE_DMA_INDEX)
+ ref_and_mask = SDMA0;
+ else
+ ref_and_mask = SDMA1;
+
+ radeon_ring_write(ring, SDMA_PACKET(SDMA_OPCODE_POLL_REG_MEM, 0,
extra_bits));
+ radeon_ring_write(ring, GPU_HDP_FLUSH_DONE);
+ radeon_ring_write(ring, GPU_HDP_FLUSH_REQ);
+ radeon_ring_write(ring, ref_and_mask); /* reference */
+ radeon_ring_write(ring, ref_and_mask); /* mask */
+ radeon_ring_write(ring, (0xfff << 16) | 10); /* retry count, poll
interval */
}
/**
Patches currently in stable-queue which might be from [email protected]
are
queue-3.13/drm-radeon-cik-use-poll_reg_mem-special-op-for-sdma-hdp.patch
queue-3.13/drm-radeon-fix-uvd-irq-support-on-si.patch
queue-3.13/drm-radeon-fix-uvd-irq-support-on-7xx.patch
queue-3.13/drm-radeon-consolidate-sdma-hdp-flushing-code-for-cik.patch
--
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