John Oram -
PCI _WAS_ used in a few 486 designs, but was intended and optimized for the
Pentium.
VLB was the preferred high-speed bus for the 486.
VLB (32-bit - VESA [Video Electronics Standards Association] Local Bus)
Four section, single level edge connector, it added 112 pins to the ISA-16.
32-Bit data bus. 32-bit address bus - Maximum 4Gig addressable memory.
The 2 added card edge sections run at the CPU clock speed, up to 33MHz.
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--+ +-+ +--+ +-+ +---|
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`-------' `--------------------' `-----------' `------------------' |
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The pins on the 2 added card edge sections are much closer together than
those on the ISA-16 sections.
Intel _was_ a member of VESA, and as such had a hand in defining the VLB's
design architecture. Such decisions as using lightly- or non-buffered CPU
signals on the VLB connectors, thus limiting the motherboards to no more
than 2 or 3 VLB sockets, have been attributed to Intel. This is untrue, as
Intel was only one among many processor, chip set, motherboard, and I/O card
companies with representatives in VESA.
What _IS_ true is that, shortly before the first VLB systems appeared, Intel
left VESA, and shortly thereafter introduced the PCI bus, which IS buffered;
and indeed is optimized for use with Pentium-class CPUs, since it is
designed with FIFO (First-In, First-Out) buffering to allow burst-mode
operation.
PCI (32- or 64-bit - Peripheral Connect Interface)
The number of pins is dependent upon which version of the PCI standard, 32-
or 64-bit, is used on the card. 32- or 64-bit data bus, 32-bit address bus.
Maximum addressable memory is 4Gig. Bus speed is 33 or 66MHz, depending upon
the PCI version.
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The PCI bus design has also been used with PowerPC-based systems, notably
the Apple Macintosh.
Dave
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