Author: yongari
Date: Mon Jan 12 03:54:33 2009
New Revision: 187081
URL: http://svn.freebsd.org/changeset/base/187081
Log:
MFC r184241-184243:
r184241:
Don't rearm watchdog timer in rl_txeof(). The watchdog timer was
already set in rl_start_locked(). Touching the watchdog timer in
other places will hide the root cause of watchdog timeouts.
r184282:
Make rl_init_locked() call rl_reset. This will put hardware into
sane state after resume/watchdog timeouts.
r184283:
After sending stop command to MAC, give hardware chance to drain
active DMA operation.
Modified:
stable/7/sys/ (props changed)
stable/7/sys/contrib/pf/ (props changed)
stable/7/sys/dev/ath/ath_hal/ (props changed)
stable/7/sys/dev/cxgb/ (props changed)
stable/7/sys/pci/if_rl.c
Modified: stable/7/sys/pci/if_rl.c
==============================================================================
--- stable/7/sys/pci/if_rl.c Mon Jan 12 03:48:25 2009 (r187080)
+++ stable/7/sys/pci/if_rl.c Mon Jan 12 03:54:33 2009 (r187081)
@@ -1348,7 +1348,6 @@ rl_txeof(struct rl_softc *sc)
CSR_WRITE_4(sc, RL_TXCFG, RL_TXCFG_CONFIG);
oldthresh = sc->rl_txthresh;
/* error recovery */
- rl_reset(sc);
rl_init_locked(sc);
/* restore original threshold */
sc->rl_txthresh = oldthresh;
@@ -1360,8 +1359,6 @@ rl_txeof(struct rl_softc *sc)
if (RL_LAST_TXMBUF(sc) == NULL)
sc->rl_watchdog_timer = 0;
- else if (sc->rl_watchdog_timer == 0)
- sc->rl_watchdog_timer = 5;
}
static void
@@ -1417,10 +1414,8 @@ rl_poll_locked(struct ifnet *ifp, enum p
/* XXX We should check behaviour on receiver stalls. */
- if (status & RL_ISR_SYSTEM_ERR) {
- rl_reset(sc);
+ if (status & RL_ISR_SYSTEM_ERR)
rl_init_locked(sc);
- }
}
}
#endif /* DEVICE_POLLING */
@@ -1457,10 +1452,8 @@ rl_intr(void *arg)
rl_rxeof(sc);
if ((status & RL_ISR_TX_OK) || (status & RL_ISR_TX_ERR))
rl_txeof(sc);
- if (status & RL_ISR_SYSTEM_ERR) {
- rl_reset(sc);
+ if (status & RL_ISR_SYSTEM_ERR)
rl_init_locked(sc);
- }
}
if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd))
@@ -1623,6 +1616,8 @@ rl_init_locked(struct rl_softc *sc)
*/
rl_stop(sc);
+ rl_reset(sc);
+
/*
* Init our MAC address. Even though the chipset
* documentation doesn't mention it, we need to enter "Config
@@ -1845,6 +1840,14 @@ rl_stop(struct rl_softc *sc)
CSR_WRITE_1(sc, RL_COMMAND, 0x00);
CSR_WRITE_2(sc, RL_IMR, 0x0000);
+ for (i = 0; i < RL_TIMEOUT; i++) {
+ DELAY(10);
+ if ((CSR_READ_1(sc, RL_COMMAND) &
+ (RL_CMD_RX_ENB | RL_CMD_TX_ENB)) == 0)
+ break;
+ }
+ if (i == RL_TIMEOUT)
+ device_printf(sc->rl_dev, "Unable to stop Tx/Rx MAC\n");
/*
* Free the TX list buffers.
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