Author: adrian
Date: Thu May 12 16:01:33 2016
New Revision: 299538
URL: https://svnweb.freebsd.org/changeset/base/299538
Log:
[siba] add TX power index entry parsing.
This is required by the bwn(4) N-PHY support.
Obtained from: Linux ssb (definitions)
Modified:
head/sys/dev/siba/siba_core.c
head/sys/dev/siba/sibareg.h
head/sys/dev/siba/sibavar.h
Modified: head/sys/dev/siba/siba_core.c
==============================================================================
--- head/sys/dev/siba/siba_core.c Thu May 12 15:48:08 2016
(r299537)
+++ head/sys/dev/siba/siba_core.c Thu May 12 16:01:33 2016
(r299538)
@@ -1569,6 +1569,47 @@ siba_sprom_r123(struct siba_sprom *out,
}
static void
+siba_sprom_r458(struct siba_sprom *out, const uint16_t *in)
+{
+
+ SIBA_SHIFTOUT(txpid2g[0], SIBA_SPROM4_TXPID2G01,
+ SIBA_SPROM4_TXPID2G0);
+ SIBA_SHIFTOUT(txpid2g[1], SIBA_SPROM4_TXPID2G01,
+ SIBA_SPROM4_TXPID2G1);
+ SIBA_SHIFTOUT(txpid2g[2], SIBA_SPROM4_TXPID2G23,
+ SIBA_SPROM4_TXPID2G2);
+ SIBA_SHIFTOUT(txpid2g[3], SIBA_SPROM4_TXPID2G23,
+ SIBA_SPROM4_TXPID2G3);
+
+ SIBA_SHIFTOUT(txpid5gl[0], SIBA_SPROM4_TXPID5GL01,
+ SIBA_SPROM4_TXPID5GL0);
+ SIBA_SHIFTOUT(txpid5gl[1], SIBA_SPROM4_TXPID5GL01,
+ SIBA_SPROM4_TXPID5GL1);
+ SIBA_SHIFTOUT(txpid5gl[2], SIBA_SPROM4_TXPID5GL23,
+ SIBA_SPROM4_TXPID5GL2);
+ SIBA_SHIFTOUT(txpid5gl[3], SIBA_SPROM4_TXPID5GL23,
+ SIBA_SPROM4_TXPID5GL3);
+
+ SIBA_SHIFTOUT(txpid5g[0], SIBA_SPROM4_TXPID5G01,
+ SIBA_SPROM4_TXPID5G0);
+ SIBA_SHIFTOUT(txpid5g[1], SIBA_SPROM4_TXPID5G01,
+ SIBA_SPROM4_TXPID5G1);
+ SIBA_SHIFTOUT(txpid5g[2], SIBA_SPROM4_TXPID5G23,
+ SIBA_SPROM4_TXPID5G2);
+ SIBA_SHIFTOUT(txpid5g[3], SIBA_SPROM4_TXPID5G23,
+ SIBA_SPROM4_TXPID5G3);
+
+ SIBA_SHIFTOUT(txpid5gh[0], SIBA_SPROM4_TXPID5GH01,
+ SIBA_SPROM4_TXPID5GH0);
+ SIBA_SHIFTOUT(txpid5gh[1], SIBA_SPROM4_TXPID5GH01,
+ SIBA_SPROM4_TXPID5GH1);
+ SIBA_SHIFTOUT(txpid5gh[2], SIBA_SPROM4_TXPID5GH23,
+ SIBA_SPROM4_TXPID5GH2);
+ SIBA_SHIFTOUT(txpid5gh[3], SIBA_SPROM4_TXPID5GH23,
+ SIBA_SPROM4_TXPID5GH3);
+}
+
+static void
siba_sprom_r45(struct siba_sprom *out, const uint16_t *in)
{
int i;
@@ -1659,6 +1700,8 @@ siba_sprom_r45(struct siba_sprom *out, c
SIBA_SHIFTOUT(core_pwr_info[i].pa_5gh[2], o +
SIBA_SPROM4_5GH_PA_2, ~0);
SIBA_SHIFTOUT(core_pwr_info[i].pa_5gh[3], o +
SIBA_SPROM4_5GH_PA_3, ~0);
}
+
+ siba_sprom_r458(out, in);
}
static void
@@ -1700,6 +1743,7 @@ siba_sprom_r8(struct siba_sprom *out, co
SIBA_SHIFTOUT(tri5gh, SIBA_SPROM8_TRI5GHL, SIBA_SPROM8_TRI5GH);
SIBA_SHIFTOUT(rxpo2g, SIBA_SPROM8_RXPO, SIBA_SPROM8_RXPO2G);
SIBA_SHIFTOUT(rxpo5g, SIBA_SPROM8_RXPO, SIBA_SPROM8_RXPO5G);
+
SIBA_SHIFTOUT(rssismf2g, SIBA_SPROM8_RSSIPARM2G, SIBA_SPROM8_RSSISMF2G);
SIBA_SHIFTOUT(rssismc2g, SIBA_SPROM8_RSSIPARM2G, SIBA_SPROM8_RSSISMC2G);
SIBA_SHIFTOUT(rssisav2g, SIBA_SPROM8_RSSIPARM2G, SIBA_SPROM8_RSSISAV2G);
@@ -1789,6 +1833,8 @@ siba_sprom_r8(struct siba_sprom *out, co
SIBA_SHIFTOUT(core_pwr_info[i].pa_5gh[1], o +
SIBA_SROM8_5GH_PA_1, ~0);
SIBA_SHIFTOUT(core_pwr_info[i].pa_5gh[2], o +
SIBA_SROM8_5GH_PA_2, ~0);
}
+
+ siba_sprom_r458(out, in);
}
static int8_t
@@ -2468,6 +2514,54 @@ siba_read_sprom(device_t dev, device_t c
case SIBA_SPROMVAR_FEM_5GHZ_ANTSWLUT:
*result = siba->siba_sprom.fem.ghz5.antswlut;
break;
+ case SIBA_SPROMVAR_TXPID_2G_0:
+ *result = siba->siba_sprom.txpid2g[0];
+ break;
+ case SIBA_SPROMVAR_TXPID_2G_1:
+ *result = siba->siba_sprom.txpid2g[1];
+ break;
+ case SIBA_SPROMVAR_TXPID_2G_2:
+ *result = siba->siba_sprom.txpid2g[2];
+ break;
+ case SIBA_SPROMVAR_TXPID_2G_3:
+ *result = siba->siba_sprom.txpid2g[3];
+ break;
+ case SIBA_SPROMVAR_TXPID_5GL_0:
+ *result = siba->siba_sprom.txpid5gl[0];
+ break;
+ case SIBA_SPROMVAR_TXPID_5GL_1:
+ *result = siba->siba_sprom.txpid5gl[1];
+ break;
+ case SIBA_SPROMVAR_TXPID_5GL_2:
+ *result = siba->siba_sprom.txpid5gl[2];
+ break;
+ case SIBA_SPROMVAR_TXPID_5GL_3:
+ *result = siba->siba_sprom.txpid5gl[3];
+ break;
+ case SIBA_SPROMVAR_TXPID_5G_0:
+ *result = siba->siba_sprom.txpid5g[0];
+ break;
+ case SIBA_SPROMVAR_TXPID_5G_1:
+ *result = siba->siba_sprom.txpid5g[1];
+ break;
+ case SIBA_SPROMVAR_TXPID_5G_2:
+ *result = siba->siba_sprom.txpid5g[2];
+ break;
+ case SIBA_SPROMVAR_TXPID_5G_3:
+ *result = siba->siba_sprom.txpid5g[3];
+ break;
+ case SIBA_SPROMVAR_TXPID_5GH_0:
+ *result = siba->siba_sprom.txpid5gh[0];
+ break;
+ case SIBA_SPROMVAR_TXPID_5GH_1:
+ *result = siba->siba_sprom.txpid5gh[1];
+ break;
+ case SIBA_SPROMVAR_TXPID_5GH_2:
+ *result = siba->siba_sprom.txpid5gh[2];
+ break;
+ case SIBA_SPROMVAR_TXPID_5GH_3:
+ *result = siba->siba_sprom.txpid5gh[3];
+ break;
default:
return (ENOENT);
}
Modified: head/sys/dev/siba/sibareg.h
==============================================================================
--- head/sys/dev/siba/sibareg.h Thu May 12 15:48:08 2016 (r299537)
+++ head/sys/dev/siba/sibareg.h Thu May 12 16:01:33 2016 (r299538)
@@ -360,6 +360,30 @@
#define SIBA_SPROM4_AGAIN23 0x1060
#define SIBA_SPROM4_AGAIN2 0x00ff
#define SIBA_SPROM4_AGAIN3 0xff00
+#define SIBA_SPROM4_TXPID2G01 0x0062
+#define SIBA_SPROM4_TXPID2G0 0x00ff
+#define SIBA_SPROM4_TXPID2G1 0xff00
+#define SIBA_SPROM4_TXPID2G23 0x0064
+#define SIBA_SPROM4_TXPID2G2 0x00ff
+#define SIBA_SPROM4_TXPID2G3 0xff00
+#define SIBA_SPROM4_TXPID5G01 0x0066
+#define SIBA_SPROM4_TXPID5G0 0x00ff
+#define SIBA_SPROM4_TXPID5G1 0xff00
+#define SIBA_SPROM4_TXPID5G23 0x0068
+#define SIBA_SPROM4_TXPID5G2 0x00ff
+#define SIBA_SPROM4_TXPID5G3 0xff00
+#define SIBA_SPROM4_TXPID5GL01 0x006a
+#define SIBA_SPROM4_TXPID5GL0 0x00ff
+#define SIBA_SPROM4_TXPID5GL1 0xff00
+#define SIBA_SPROM4_TXPID5GL23 0x006c
+#define SIBA_SPROM4_TXPID5GL2 0x00ff
+#define SIBA_SPROM4_TXPID5GL3 0xff00
+#define SIBA_SPROM4_TXPID5GH01 0x006e
+#define SIBA_SPROM4_TXPID5GH0 0x00ff
+#define SIBA_SPROM4_TXPID5GH1 0xff00
+#define SIBA_SPROM4_TXPID5GH23 0x0070
+#define SIBA_SPROM4_TXPID5GH2 0x00ff
+#define SIBA_SPROM4_TXPID5GH3 0xff00
#define SIBA_SPROM4_BFHIGH 0x1046
#define SIBA_SPROM4_MAXP_BG 0x1080
#define SIBA_SPROM4_MAXP_BG_MASK 0x00ff
Modified: head/sys/dev/siba/sibavar.h
==============================================================================
--- head/sys/dev/siba/sibavar.h Thu May 12 15:48:08 2016 (r299537)
+++ head/sys/dev/siba/sibavar.h Thu May 12 16:01:33 2016 (r299538)
@@ -289,6 +289,22 @@ enum siba_sprom_vars {
SIBA_SPROMVAR_FEM_5GHZ_PDET_RANGE,
SIBA_SPROMVAR_FEM_5GHZ_TR_ISO,
SIBA_SPROMVAR_FEM_5GHZ_ANTSWLUT,
+ SIBA_SPROMVAR_TXPID_2G_0,
+ SIBA_SPROMVAR_TXPID_2G_1,
+ SIBA_SPROMVAR_TXPID_2G_2,
+ SIBA_SPROMVAR_TXPID_2G_3,
+ SIBA_SPROMVAR_TXPID_5GL_0,
+ SIBA_SPROMVAR_TXPID_5GL_1,
+ SIBA_SPROMVAR_TXPID_5GL_2,
+ SIBA_SPROMVAR_TXPID_5GL_3,
+ SIBA_SPROMVAR_TXPID_5G_0,
+ SIBA_SPROMVAR_TXPID_5G_1,
+ SIBA_SPROMVAR_TXPID_5G_2,
+ SIBA_SPROMVAR_TXPID_5G_3,
+ SIBA_SPROMVAR_TXPID_5GH_0,
+ SIBA_SPROMVAR_TXPID_5GH_1,
+ SIBA_SPROMVAR_TXPID_5GH_2,
+ SIBA_SPROMVAR_TXPID_5GH_3,
};
int siba_read_sprom(device_t, device_t, int, uintptr_t *);
@@ -386,6 +402,23 @@ SIBA_SPROM_ACCESSOR(fem_5ghz_extpa_gain,
SIBA_SPROM_ACCESSOR(fem_5ghz_pdet_range, FEM_5GHZ_PDET_RANGE, uint8_t);
SIBA_SPROM_ACCESSOR(fem_5ghz_tr_iso, FEM_5GHZ_TR_ISO, uint8_t);
SIBA_SPROM_ACCESSOR(fem_5ghz_antswlut, FEM_5GHZ_ANTSWLUT, uint8_t);
+/* TX power index */
+SIBA_SPROM_ACCESSOR(txpid_2g_0, TXPID_2G_0, uint8_t);
+SIBA_SPROM_ACCESSOR(txpid_2g_1, TXPID_2G_1, uint8_t);
+SIBA_SPROM_ACCESSOR(txpid_2g_2, TXPID_2G_2, uint8_t);
+SIBA_SPROM_ACCESSOR(txpid_2g_3, TXPID_2G_3, uint8_t);
+SIBA_SPROM_ACCESSOR(txpid_5gl_0, TXPID_5GL_0, uint8_t);
+SIBA_SPROM_ACCESSOR(txpid_5gl_1, TXPID_5GL_1, uint8_t);
+SIBA_SPROM_ACCESSOR(txpid_5gl_2, TXPID_5GL_2, uint8_t);
+SIBA_SPROM_ACCESSOR(txpid_5gl_3, TXPID_5GL_3, uint8_t);
+SIBA_SPROM_ACCESSOR(txpid_5g_0, TXPID_5G_0, uint8_t);
+SIBA_SPROM_ACCESSOR(txpid_5g_1, TXPID_5G_1, uint8_t);
+SIBA_SPROM_ACCESSOR(txpid_5g_2, TXPID_5G_2, uint8_t);
+SIBA_SPROM_ACCESSOR(txpid_5g_3, TXPID_5G_3, uint8_t);
+SIBA_SPROM_ACCESSOR(txpid_5gh_0, TXPID_5GH_0, uint8_t);
+SIBA_SPROM_ACCESSOR(txpid_5gh_1, TXPID_5GH_1, uint8_t);
+SIBA_SPROM_ACCESSOR(txpid_5gh_2, TXPID_5GH_2, uint8_t);
+SIBA_SPROM_ACCESSOR(txpid_5gh_3, TXPID_5GH_3, uint8_t);
#undef SIBA_SPROM_ACCESSOR
@@ -436,6 +469,10 @@ struct siba_sprom {
uint8_t tri5gl;
uint8_t tri5g;
uint8_t tri5gh;
+ uint8_t txpid2g[4]; /* 2GHz TX power index */
+ uint8_t txpid5gl[4]; /* 4.9 - 5.1GHz TX power index
*/
+ uint8_t txpid5g[4]; /* 5.1 - 5.5GHz TX power index
*/
+ uint8_t txpid5gh[4]; /* 5.5 - 5.9GHz TX power index
*/
uint8_t rssisav2g;
uint8_t rssismc2g;
uint8_t rssismf2g;
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