On Mon, May 08, 2017 at 11:52:10PM +0300, Konstantin Belousov wrote:
> On Mon, May 08, 2017 at 01:37:15PM -0700, John Baldwin wrote:
> > On Thursday, May 04, 2017 09:31:50 PM Konstantin Belousov wrote:
> > > Author: kib
> > > Date: Thu May  4 21:31:50 2017
> > > New Revision: 317809
> > > URL: https://svnweb.freebsd.org/changeset/base/317809
> > > 
> > > Log:
> > >   Provide introduction for the arch(7) manpage.
> > >   
> > >   Start with some words about linear address space and its layout, then
> > >   explain pointers models and ABIs, providing explanation to the
> > >   structure of the tables.
> > >   
> > >   Reviewed by:    emaste, imp
> > >   'Future-proof' cheri wording by:        brooks
> > >   Sponsored by:   The FreeBSD Foundation
> > >   MFC after:      2 weeks
> > >   Differential revision:  https://reviews.freebsd.org/D10596
> > 
> > Note that mips n32 is neither ILP32 or LP64, it P32L64.  (Similar to x32
> > for x86 if we were to ever add that.)  Thus, we support 3 ABIs rather
> > than just 2.
> 
> I trust your information about MIPS n32, but x32 uses ILP32 model.
In fact, from all documents that I can found about n32, it seems that
long == pointer == 32bit.  This is mentioned in the MIPSpro N32 ABI Handbook
and in the MIPS Tech document MD00305 'MIPS ABIs Described'.

The only strange thing for n32 is that register_t is 64bit, and vm_paddr_t
is similar to PAE.

> In particular, sizeof(long) == 4, according to the AMD64 ABI Draft 0.99.8,
> which includes both LP64 and ILP32 (x32) ABI description.
> 
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