Author: mav
Date: Wed May 23 15:22:58 2018
New Revision: 334099
URL: https://svnweb.freebsd.org/changeset/base/334099
Log:
Add ready polling after PHY reset on VIA SATA controllers.
According to PR there are cases of controller hang if soft reset is
sent before device report ready status after the hard reset.
I don't think this patch is perfect, but it was reported as working
by the submitter, and I have neither the old hardware nor interest to
test some improved version, so just done some style cleaning.
PR: 183294
Submitted by: alexandre.mart...@netasq.com
MFC after: 1 month
Modified:
head/sys/dev/ata/chipsets/ata-via.c
Modified: head/sys/dev/ata/chipsets/ata-via.c
==============================================================================
--- head/sys/dev/ata/chipsets/ata-via.c Wed May 23 14:19:06 2018
(r334098)
+++ head/sys/dev/ata/chipsets/ata-via.c Wed May 23 15:22:58 2018
(r334099)
@@ -449,12 +449,29 @@ static void
ata_via_sata_reset(device_t dev)
{
struct ata_channel *ch = device_get_softc(dev);
- int devs;
+ int devs, count;
+ uint8_t status;
if (ch->unit == 0) {
devs = ata_sata_phy_reset(dev, 0, 0);
- DELAY(10000);
+ count = 0;
+ do {
+ ATA_IDX_OUTB(ch, ATA_DRIVE, ATA_D_IBM | ATA_D_LBA |
+ ATA_DEV(ATA_MASTER));
+ DELAY(1000);
+ status = ATA_IDX_INB(ch, ATA_STATUS);
+ count++;
+ } while (status & ATA_S_BUSY && count < 100);
+
devs += ata_sata_phy_reset(dev, 1, 0);
+ count = 0;
+ do {
+ ATA_IDX_OUTB(ch, ATA_DRIVE, ATA_D_IBM | ATA_D_LBA |
+ ATA_DEV(ATA_SLAVE));
+ DELAY(1000);
+ status = ATA_IDX_INB(ch, ATA_STATUS);
+ count++;
+ } while (status & ATA_S_BUSY && count < 100);
} else
devs = 1;
if (devs)
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