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On Sat, 19 Dec 2009 05:45, avg@ wrote:
Author: avg
Date: Sat Dec 19 10:45:57 2009
New Revision: 200714
URL: http://svn.freebsd.org/changeset/base/200714

Log:
 MFC r200064: mca: small enhancements related to cpu quirks

Modified:
 stable/7/sys/amd64/amd64/mca.c
 stable/7/sys/i386/i386/mca.c
Directory Properties:
 stable/7/sys/   (props changed)
 stable/7/sys/cddl/contrib/opensolaris/   (props changed)
 stable/7/sys/contrib/dev/acpica/   (props changed)
 stable/7/sys/contrib/pf/   (props changed)

Modified: stable/7/sys/amd64/amd64/mca.c
==============================================================================
--- stable/7/sys/amd64/amd64/mca.c      Sat Dec 19 10:44:26 2009        
(r200713)
+++ stable/7/sys/amd64/amd64/mca.c      Sat Dec 19 10:45:57 2009        
(r200714)
@@ -43,6 +43,7 @@ __FBSDID("$FreeBSD$");
#include <sys/sysctl.h>
#include <sys/systm.h>
#include <sys/taskqueue.h>
+#include <machine/cputypes.h>
#include <machine/mca.h>
#include <machine/md_var.h>
#include <machine/specialreg.h>
@@ -478,6 +479,8 @@ void
mca_init(void)
{
        uint64_t mcg_cap;
+       uint64_t ctl;
+       int skip;
        int i;

        /* MCE is required. */
@@ -495,15 +498,26 @@ mca_init(void)
                        wrmsr(MSR_MCG_CTL, MCG_CTL_ENABLE);

                for (i = 0; i < (mcg_cap & MCG_CAP_COUNT); i++) {
-                       /*
-                        * Enable logging of all errors.  For P6
-                        * processors, MC0_CTL is always enabled.
-                        *
-                        * XXX: Better CPU test needed here?
-                        */
-                       if (!(i == 0 && (cpu_id & 0xf00) == 0x600))
-                               wrmsr(MSR_MC_CTL(i), 0xffffffffffffffffUL);
+                       /* By default enable logging of all errors. */
+                       ctl = 0xffffffffffffffffUL;
+                       skip = 0;
+
+                       if (cpu_vendor_id == CPU_VENDOR_INTEL) {
+                               /*
+                                * For P6 models before Nehalem MC0_CTL is
+                                * always enabled and reserved.
+                                */
+                               if (i == 0 && CPUID_TO_FAMILY(cpu_id) == 0x6
+                                   && CPUID_TO_MODEL(cpu_id) < 0x1a)
+                                       skip = 1;
+                       } else if (cpu_vendor_id == CPU_VENDOR_AMD) {
+                               /* BKDG for Family 10h: unset GartTblWkEn. */
+                               if (i == 4 && CPUID_TO_FAMILY(cpu_id) >= 0xf)
+                                       ctl &= ~(1UL << 10);
+                       }

+                       if (!skip)
+                               wrmsr(MSR_MC_CTL(i), ctl);
                        /* Clear all errors. */
                        wrmsr(MSR_MC_STATUS(i), 0);
                }

Modified: stable/7/sys/i386/i386/mca.c
==============================================================================
--- stable/7/sys/i386/i386/mca.c        Sat Dec 19 10:44:26 2009        
(r200713)
+++ stable/7/sys/i386/i386/mca.c        Sat Dec 19 10:45:57 2009        
(r200714)
@@ -43,6 +43,7 @@ __FBSDID("$FreeBSD$");
#include <sys/sysctl.h>
#include <sys/systm.h>
#include <sys/taskqueue.h>
+#include <machine/cputypes.h>
#include <machine/mca.h>
#include <machine/md_var.h>
#include <machine/specialreg.h>
@@ -478,6 +479,8 @@ void
mca_init(void)
{
        uint64_t mcg_cap;
+       uint64_t ctl;
+       int skip;
        int i;

        /* MCE is required. */
@@ -495,15 +498,26 @@ mca_init(void)
                        wrmsr(MSR_MCG_CTL, MCG_CTL_ENABLE);

                for (i = 0; i < (mcg_cap & MCG_CAP_COUNT); i++) {
-                       /*
-                        * Enable logging of all errors.  For P6
-                        * processors, MC0_CTL is always enabled.
-                        *
-                        * XXX: Better CPU test needed here?
-                        */
-                       if (!(i == 0 && (cpu_id & 0xf00) == 0x600))
-                               wrmsr(MSR_MC_CTL(i), 0xffffffffffffffffUL);
+                       /* By default enable logging of all errors. */
+                       ctl = 0xffffffffffffffffUL;
+                       skip = 0;
+
+                       if (cpu_vendor_id == CPU_VENDOR_INTEL) {
+                               /*
+                                * For P6 models before Nehalem MC0_CTL is
+                                * always enabled and reserved.
+                                */
+                               if (i == 0 && CPUID_TO_FAMILY(cpu_id) == 0x6
+                                   && CPUID_TO_MODEL(cpu_id) < 0x1a)
+                                       skip = 1;
+                       } else if (cpu_vendor_id == CPU_VENDOR_AMD) {
+                               /* BKDG for Family 10h: unset GartTblWkEn. */
+                               if (i == 4 && CPUID_TO_FAMILY(cpu_id) >= 0xf)
+                                       ctl &= ~(1UL << 10);
+                       }

+                       if (!skip)
+                               wrmsr(MSR_MC_CTL(i), ctl);
                        /* Clear all errors. */
                        wrmsr(MSR_MC_STATUS(i), 0);
                }


[FYI]
Following errors are being generated on stable/7 i386 "Intel" based machine. If more information is needed, let me know.

cc1: warnings being treated as errors
/usr/src/sys/i386/i386/mca.c: In function 'mca_init':
/usr/src/sys/i386/i386/mca.c:510: warning: implicit declaration of function 
'CPUID_TO_FAMILY'
/usr/src/sys/i386/i386/mca.c:510: warning: nested extern declaration of 
'CPUID_TO_FAMILY'
/usr/src/sys/i386/i386/mca.c:511: warning: implicit declaration of function 
'CPUID_TO_MODEL'
/usr/src/sys/i386/i386/mca.c:511: warning: nested extern declaration of 
'CPUID_TO_MODEL'
*** Error code 1

- --
 Sat Dec 19 14:16:11 2009 -0500

 jhell
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