Author: kadesai
Date: Wed Dec 26 10:46:23 2018
New Revision: 342537
URL: https://svnweb.freebsd.org/changeset/base/342537
Log:
This patch will add support for latest generation MegaRAID adapters-
Aero(39xx).
Driver will throw a warning message when a Configurable secure type
controller is
encountered.
Submitted by: Sumit Saxena <sumit.sax...@broadcom.com>
Reviewed by: Kashyap Desai <kashyap.de...@broadcom.com>
Approved by: ken
MFC after: 3 days
Sponsored by: Broadcom Inc
Modified:
head/sys/dev/mrsas/mrsas.c
head/sys/dev/mrsas/mrsas.h
head/sys/dev/mrsas/mrsas_cam.c
head/sys/dev/mrsas/mrsas_fp.c
Modified: head/sys/dev/mrsas/mrsas.c
==============================================================================
--- head/sys/dev/mrsas/mrsas.c Wed Dec 26 10:44:30 2018 (r342536)
+++ head/sys/dev/mrsas/mrsas.c Wed Dec 26 10:46:23 2018 (r342537)
@@ -201,6 +201,14 @@ MRSAS_CTLR_ID device_table[] = {
{0x1000, MRSAS_TOMCAT, 0xffff, 0xffff, "AVAGO Tomcat SAS Controller"},
{0x1000, MRSAS_VENTURA_4PORT, 0xffff, 0xffff, "AVAGO Ventura_4Port SAS
Controller"},
{0x1000, MRSAS_CRUSADER_4PORT, 0xffff, 0xffff, "AVAGO Crusader_4Port
SAS Controller"},
+ {0x1000, MRSAS_AERO_10E0, 0xffff, 0xffff, "BROADCOM AERO-10E0 SAS
Controller"},
+ {0x1000, MRSAS_AERO_10E1, 0xffff, 0xffff, "BROADCOM AERO-10E1 SAS
Controller"},
+ {0x1000, MRSAS_AERO_10E2, 0xffff, 0xffff, "BROADCOM AERO-10E2 SAS
Controller"},
+ {0x1000, MRSAS_AERO_10E3, 0xffff, 0xffff, "BROADCOM AERO-10E3 SAS
Controller"},
+ {0x1000, MRSAS_AERO_10E4, 0xffff, 0xffff, "BROADCOM AERO-10E4 SAS
Controller"},
+ {0x1000, MRSAS_AERO_10E5, 0xffff, 0xffff, "BROADCOM AERO-10E5 SAS
Controller"},
+ {0x1000, MRSAS_AERO_10E6, 0xffff, 0xffff, "BROADCOM AERO-10E6 SAS
Controller"},
+ {0x1000, MRSAS_AERO_10E7, 0xffff, 0xffff, "BROADCOM AERO-10E7 SAS
Controller"},
{0, 0, 0, 0, NULL}
};
@@ -845,20 +853,37 @@ mrsas_attach(device_t dev)
sc->mrsas_dev = dev;
sc->device_id = pci_get_device(dev);
- if ((sc->device_id == MRSAS_INVADER) ||
- (sc->device_id == MRSAS_FURY) ||
- (sc->device_id == MRSAS_INTRUDER) ||
- (sc->device_id == MRSAS_INTRUDER_24) ||
- (sc->device_id == MRSAS_CUTLASS_52) ||
- (sc->device_id == MRSAS_CUTLASS_53)) {
+ switch (sc->device_id) {
+ case MRSAS_INVADER:
+ case MRSAS_FURY:
+ case MRSAS_INTRUDER:
+ case MRSAS_INTRUDER_24:
+ case MRSAS_CUTLASS_52:
+ case MRSAS_CUTLASS_53:
sc->mrsas_gen3_ctrl = 1;
- } else if ((sc->device_id == MRSAS_VENTURA) ||
- (sc->device_id == MRSAS_CRUSADER) ||
- (sc->device_id == MRSAS_HARPOON) ||
- (sc->device_id == MRSAS_TOMCAT) ||
- (sc->device_id == MRSAS_VENTURA_4PORT) ||
- (sc->device_id == MRSAS_CRUSADER_4PORT)) {
+ break;
+ case MRSAS_VENTURA:
+ case MRSAS_CRUSADER:
+ case MRSAS_HARPOON:
+ case MRSAS_TOMCAT:
+ case MRSAS_VENTURA_4PORT:
+ case MRSAS_CRUSADER_4PORT:
sc->is_ventura = true;
+ break;
+ case MRSAS_AERO_10E1:
+ case MRSAS_AERO_10E5:
+ device_printf(dev, "Adapter is in configurable secure mode\n");
+ case MRSAS_AERO_10E2:
+ case MRSAS_AERO_10E6:
+ sc->is_aero = true;
+ break;
+ case MRSAS_AERO_10E0:
+ case MRSAS_AERO_10E3:
+ case MRSAS_AERO_10E4:
+ case MRSAS_AERO_10E7:
+ device_printf(dev, "Adapter is in non-secure mode\n");
+ return SUCCESS;
+
}
mrsas_get_tunables(sc);
@@ -874,8 +899,8 @@ mrsas_attach(device_t dev)
cmd |= PCIM_CMD_BUSMASTEREN;
pci_write_config(dev, PCIR_COMMAND, cmd, 2);
- /* For Ventura system registers are mapped to BAR0 */
- if (sc->is_ventura)
+ /* For Ventura/Aero system registers are mapped to BAR0 */
+ if (sc->is_ventura || sc->is_aero)
sc->reg_res_id = PCIR_BAR(0); /* BAR0 offset */
else
sc->reg_res_id = PCIR_BAR(1); /* BAR1 offset */
@@ -1099,7 +1124,7 @@ mrsas_detach(device_t dev)
mrsas_shutdown_ctlr(sc, MR_DCMD_CTRL_SHUTDOWN);
mrsas_disable_intr(sc);
- if (sc->is_ventura && sc->streamDetectByLD) {
+ if ((sc->is_ventura || sc->is_aero) && sc->streamDetectByLD) {
for (i = 0; i < MAX_LOGICAL_DRIVES_EXT; ++i)
free(sc->streamDetectByLD[i], M_MRSAS);
free(sc->streamDetectByLD, M_MRSAS);
@@ -2285,7 +2310,7 @@ mrsas_init_fw(struct mrsas_softc *sc)
if (ret != SUCCESS) {
return (ret);
}
- if (sc->is_ventura) {
+ if (sc->is_ventura || sc->is_aero) {
scratch_pad_3 = mrsas_read_reg(sc, offsetof(mrsas_reg_set,
outbound_scratch_pad_3));
#if VD_EXT_DEBUG
device_printf(sc->mrsas_dev, "scratch_pad_3 0x%x\n",
scratch_pad_3);
@@ -2316,7 +2341,7 @@ mrsas_init_fw(struct mrsas_softc *sc)
fw_msix_count = sc->msix_vectors;
if ((sc->mrsas_gen3_ctrl && (sc->msix_vectors > 8)) ||
- (sc->is_ventura && (sc->msix_vectors > 16)))
+ ((sc->is_ventura || sc->is_aero) &&
(sc->msix_vectors > 16)))
sc->msix_combined = true;
/*
* Save 1-15 reply post index
@@ -2359,7 +2384,7 @@ mrsas_init_fw(struct mrsas_softc *sc)
return (1);
}
- if (sc->is_ventura) {
+ if (sc->is_ventura || sc->is_aero) {
scratch_pad_4 = mrsas_read_reg(sc, offsetof(mrsas_reg_set,
outbound_scratch_pad_4));
if ((scratch_pad_4 & MR_NVME_PAGE_SIZE_MASK) >=
MR_DEFAULT_NVME_PAGE_SHIFT)
@@ -2424,7 +2449,7 @@ mrsas_init_fw(struct mrsas_softc *sc)
return (1);
}
- if (sc->is_ventura && sc->drv_stream_detection) {
+ if ((sc->is_ventura || sc->is_aero) && sc->drv_stream_detection) {
sc->streamDetectByLD = malloc(sizeof(PTR_LD_STREAM_DETECT) *
MAX_LOGICAL_DRIVES_EXT,
M_MRSAS, M_NOWAIT);
if (!sc->streamDetectByLD) {
@@ -2678,7 +2703,7 @@ mrsas_ioc_init(struct mrsas_softc *sc)
init_frame->flags |= MFI_FRAME_DONT_POST_IN_REPLY_QUEUE;
/* driver support Extended MSIX */
- if (sc->mrsas_gen3_ctrl || sc->is_ventura) {
+ if (sc->mrsas_gen3_ctrl || sc->is_ventura || sc->is_aero) {
init_frame->driver_operations.
mfi_capabilities.support_additional_msix = 1;
}
@@ -3306,7 +3331,7 @@ mrsas_reset_ctrl(struct mrsas_softc *sc, u_int8_t rese
megasas_setup_jbod_map(sc);
- if (sc->is_ventura && sc->streamDetectByLD) {
+ if ((sc->is_ventura || sc->is_aero) &&
sc->streamDetectByLD) {
for (j = 0; j < MAX_LOGICAL_DRIVES_EXT; ++j) {
memset(sc->streamDetectByLD[i], 0,
sizeof(LD_STREAM_DETECT));
sc->streamDetectByLD[i]->mruBitMap =
MR_STREAM_BITMAP;
@@ -3834,7 +3859,7 @@ mrsas_build_mptmfi_passthru(struct mrsas_softc *sc, st
io_req = mpt_cmd->io_request;
- if (sc->mrsas_gen3_ctrl || sc->is_ventura) {
+ if (sc->mrsas_gen3_ctrl || sc->is_ventura || sc->is_aero) {
pMpi25IeeeSgeChain64_t sgl_ptr_end =
(pMpi25IeeeSgeChain64_t)&io_req->SGL;
sgl_ptr_end += sc->max_sge_in_main_msg - 1;
Modified: head/sys/dev/mrsas/mrsas.h
==============================================================================
--- head/sys/dev/mrsas/mrsas.h Wed Dec 26 10:44:30 2018 (r342536)
+++ head/sys/dev/mrsas/mrsas.h Wed Dec 26 10:46:23 2018 (r342537)
@@ -91,7 +91,16 @@ __FBSDID("$FreeBSD$");
#define MRSAS_TOMCAT 0x0017
#define MRSAS_VENTURA_4PORT 0x001B
#define MRSAS_CRUSADER_4PORT 0x001C
+#define MRSAS_AERO_10E0 0x10E0
+#define MRSAS_AERO_10E1 0x10E1
+#define MRSAS_AERO_10E2 0x10E2
+#define MRSAS_AERO_10E3 0x10E3
+#define MRSAS_AERO_10E4 0x10E4
+#define MRSAS_AERO_10E5 0x10E5
+#define MRSAS_AERO_10E6 0x10E6
+#define MRSAS_AERO_10E7 0x10E7
+
/*
* Firmware State Defines
*/
@@ -3355,6 +3364,7 @@ struct mrsas_softc {
u_int32_t nvme_page_size;
boolean_t is_ventura;
+ boolean_t is_aero;
boolean_t msix_combined;
u_int16_t maxRaidMapSize;
Modified: head/sys/dev/mrsas/mrsas_cam.c
==============================================================================
--- head/sys/dev/mrsas/mrsas_cam.c Wed Dec 26 10:44:30 2018
(r342536)
+++ head/sys/dev/mrsas/mrsas_cam.c Wed Dec 26 10:46:23 2018
(r342537)
@@ -867,7 +867,7 @@ mrsas_build_ldio_rw(struct mrsas_softc *sc, struct mrs
"max (0x%x) allowed\n", cmd->sge_count,
sc->max_num_sge);
return (FAIL);
}
- if (sc->is_ventura)
+ if (sc->is_ventura || sc->is_aero)
io_request->RaidContext.raid_context_g35.numSGE =
cmd->sge_count;
else {
/*
@@ -1071,7 +1071,7 @@ mrsas_setup_io(struct mrsas_softc *sc, struct mrsas_mp
cmd->request_desc->SCSIIO.MSIxIndex =
sc->msix_vectors ? smp_processor_id() % sc->msix_vectors : 0;
- if (sc->is_ventura) {
+ if (sc->is_ventura || sc->is_aero) {
if (sc->streamDetectByLD) {
mtx_lock(&sc->stream_lock);
mrsas_stream_detect(sc, cmd, &io_info);
@@ -1121,7 +1121,7 @@ mrsas_setup_io(struct mrsas_softc *sc, struct mrsas_mp
io_request->RaidContext.raid_context.regLockFlags |=
(MR_RL_FLAGS_GRANT_DESTINATION_CUDA |
MR_RL_FLAGS_SEQ_NUM_ENABLE);
- } else if (sc->is_ventura) {
+ } else if (sc->is_ventura || sc->is_aero) {
io_request->RaidContext.raid_context_g35.Type =
MPI2_TYPE_CUDA;
io_request->RaidContext.raid_context_g35.nseg = 0x1;
io_request->RaidContext.raid_context_g35.routingFlags.bits.sqn = 1;
@@ -1139,14 +1139,14 @@ mrsas_setup_io(struct mrsas_softc *sc, struct mrsas_mp
&sc->load_balance_info[device_id], &io_info);
cmd->load_balance = MRSAS_LOAD_BALANCE_FLAG;
cmd->pd_r1_lb = io_info.pd_after_lb;
- if (sc->is_ventura)
+ if (sc->is_ventura || sc->is_aero)
io_request->RaidContext.raid_context_g35.spanArm = io_info.span_arm;
else
io_request->RaidContext.raid_context.spanArm =
io_info.span_arm;
} else
cmd->load_balance = 0;
- if (sc->is_ventura)
+ if (sc->is_ventura || sc->is_aero)
cmd->r1_alt_dev_handle =
io_info.r1_alt_dev_handle;
else
cmd->r1_alt_dev_handle = MR_DEVHANDLE_INVALID;
@@ -1170,7 +1170,7 @@ mrsas_setup_io(struct mrsas_softc *sc, struct mrsas_mp
(MR_RL_FLAGS_GRANT_DESTINATION_CPU0 |
MR_RL_FLAGS_SEQ_NUM_ENABLE);
io_request->RaidContext.raid_context.nseg = 0x1;
- } else if (sc->is_ventura) {
+ } else if (sc->is_ventura || sc->is_aero) {
io_request->RaidContext.raid_context_g35.Type =
MPI2_TYPE_CUDA;
io_request->RaidContext.raid_context_g35.routingFlags.bits.sqn = 1;
io_request->RaidContext.raid_context_g35.nseg = 0x1;
@@ -1229,7 +1229,7 @@ mrsas_build_ldio_nonrw(struct mrsas_softc *sc, struct
"max (0x%x) allowed\n", cmd->sge_count,
sc->max_num_sge);
return (1);
}
- if (sc->is_ventura)
+ if (sc->is_ventura || sc->is_aero)
io_request->RaidContext.raid_context_g35.numSGE =
cmd->sge_count;
else {
/*
@@ -1294,7 +1294,7 @@ mrsas_build_syspdio(struct mrsas_softc *sc, struct mrs
device_id + 255;
io_request->RaidContext.raid_context.configSeqNum =
pd_sync->seq[device_id].seqNum;
io_request->DevHandle = pd_sync->seq[device_id].devHandle;
- if (sc->is_ventura)
+ if (sc->is_ventura || sc->is_aero)
io_request->RaidContext.raid_context_g35.routingFlags.bits.sqn = 1;
else
io_request->RaidContext.raid_context.regLockFlags |=
@@ -1342,7 +1342,7 @@ mrsas_build_syspdio(struct mrsas_softc *sc, struct mrs
* Because the NON RW cmds will now go via FW Queue
* and not the Exception queue
*/
- if (sc->mrsas_gen3_ctrl || sc->is_ventura)
+ if (sc->mrsas_gen3_ctrl || sc->is_ventura || sc->is_aero)
io_request->IoFlags |=
MPI25_SAS_DEVICE0_FLAGS_ENABLED_FAST_PATH;
cmd->request_desc->SCSIIO.RequestFlags =
@@ -1359,7 +1359,7 @@ mrsas_build_syspdio(struct mrsas_softc *sc, struct mrs
"max (0x%x) allowed\n", cmd->sge_count,
sc->max_num_sge);
return (1);
}
- if (sc->is_ventura)
+ if (sc->is_ventura || sc->is_aero)
io_request->RaidContext.raid_context_g35.numSGE =
cmd->sge_count;
else {
/*
@@ -1522,7 +1522,7 @@ static void mrsas_build_ieee_sgl(struct mrsas_mpt_cmd
io_request = cmd->io_request;
sgl_ptr = (pMpi25IeeeSgeChain64_t)&io_request->SGL;
- if (sc->mrsas_gen3_ctrl || sc->is_ventura) {
+ if (sc->mrsas_gen3_ctrl || sc->is_ventura || sc->is_aero) {
pMpi25IeeeSgeChain64_t sgl_ptr_end = sgl_ptr;
sgl_ptr_end += sc->max_sge_in_main_msg - 1;
@@ -1533,7 +1533,7 @@ static void mrsas_build_ieee_sgl(struct mrsas_mpt_cmd
sgl_ptr->Address = segs[i].ds_addr;
sgl_ptr->Length = segs[i].ds_len;
sgl_ptr->Flags = 0;
- if (sc->mrsas_gen3_ctrl || sc->is_ventura) {
+ if (sc->mrsas_gen3_ctrl || sc->is_ventura ||
sc->is_aero) {
if (i == nseg - 1)
sgl_ptr->Flags =
IEEE_SGE_FLAGS_END_OF_LIST;
}
@@ -1543,7 +1543,7 @@ static void mrsas_build_ieee_sgl(struct mrsas_mpt_cmd
(nseg > sc->max_sge_in_main_msg)) {
pMpi25IeeeSgeChain64_t sg_chain;
- if (sc->mrsas_gen3_ctrl || sc->is_ventura) {
+ if (sc->mrsas_gen3_ctrl || sc->is_ventura ||
sc->is_aero) {
if ((cmd->io_request->IoFlags &
MPI25_SAS_DEVICE0_FLAGS_ENABLED_FAST_PATH)
!=
MPI25_SAS_DEVICE0_FLAGS_ENABLED_FAST_PATH)
cmd->io_request->ChainOffset =
sc->chain_offset_io_request;
@@ -1552,7 +1552,7 @@ static void mrsas_build_ieee_sgl(struct mrsas_mpt_cmd
} else
cmd->io_request->ChainOffset =
sc->chain_offset_io_request;
sg_chain = sgl_ptr;
- if (sc->mrsas_gen3_ctrl || sc->is_ventura)
+ if (sc->mrsas_gen3_ctrl || sc->is_ventura ||
sc->is_aero)
sg_chain->Flags =
IEEE_SGE_FLAGS_CHAIN_ELEMENT;
else
sg_chain->Flags =
(IEEE_SGE_FLAGS_CHAIN_ELEMENT | MPI2_IEEE_SGE_FLAGS_IOCPLBNTA_ADDR);
Modified: head/sys/dev/mrsas/mrsas_fp.c
==============================================================================
--- head/sys/dev/mrsas/mrsas_fp.c Wed Dec 26 10:44:30 2018
(r342536)
+++ head/sys/dev/mrsas/mrsas_fp.c Wed Dec 26 10:46:23 2018
(r342537)
@@ -983,7 +983,7 @@ mr_spanset_get_phy_params(struct mrsas_softc *sc, u_in
}
*pdBlock += stripRef + MR_LdSpanPtrGet(ld, span, map)->startBlk;
- if (sc->is_ventura) {
+ if (sc->is_ventura || sc->is_aero) {
((RAID_CONTEXT_G35 *) pRAID_Context)->spanArm =
(span << RAID_CTX_SPANARM_SPAN_SHIFT) | physArm;
io_info->span_arm = (span << RAID_CTX_SPANARM_SPAN_SHIFT) |
physArm;
@@ -1190,7 +1190,7 @@ MR_BuildRaidContext(struct mrsas_softc *sc, struct IO_
* if FP possible, set the SLUD bit in regLockFlags for
* ventura
*/
- else if ((sc->is_ventura) && !isRead &&
+ else if ((sc->is_ventura || sc->is_aero) && !isRead &&
(raid->writeMode == MR_RL_WRITE_BACK_MODE) &&
(raid->level <= 1) &&
raid->capability.fpCacheBypassCapable) {
((RAID_CONTEXT_G35 *)
pRAID_Context)->routingFlags.bits.sld = 1;
@@ -1729,7 +1729,7 @@ MR_GetPhyParams(struct mrsas_softc *sc, u_int32_t ld,
}
*pdBlock += stripRef + MR_LdSpanPtrGet(ld, span, map)->startBlk;
- if (sc->is_ventura) {
+ if (sc->is_ventura || sc->is_aero) {
((RAID_CONTEXT_G35 *) pRAID_Context)->spanArm =
(span << RAID_CTX_SPANARM_SPAN_SHIFT) | physArm;
io_info->span_arm = (span << RAID_CTX_SPANARM_SPAN_SHIFT) |
physArm;
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