Author: cem
Date: Wed May 22 23:22:36 2019
New Revision: 348130
URL: https://svnweb.freebsd.org/changeset/base/348130
Log:
Decode and name additional x86 feature bits
These are all enumerated in Intel's ISA extension reference, 37th ed.
Sponsored by: Dell EMC Isilon
Modified:
head/sys/x86/include/specialreg.h
head/sys/x86/x86/identcpu.c
Modified: head/sys/x86/include/specialreg.h
==============================================================================
--- head/sys/x86/include/specialreg.h Wed May 22 23:19:20 2019
(r348129)
+++ head/sys/x86/include/specialreg.h Wed May 22 23:22:36 2019
(r348130)
@@ -433,29 +433,41 @@
/*
* CPUID instruction 7 Structured Extended Features, leaf 0 ecx info
*/
-#define CPUID_STDEXT2_PREFETCHWT1 0x00000001
-#define CPUID_STDEXT2_UMIP 0x00000004
-#define CPUID_STDEXT2_PKU 0x00000008
-#define CPUID_STDEXT2_OSPKE 0x00000010
-#define CPUID_STDEXT2_WAITPKG 0x00000020
-#define CPUID_STDEXT2_GFNI 0x00000100
-#define CPUID_STDEXT2_RDPID 0x00400000
-#define CPUID_STDEXT2_CLDEMOTE 0x02000000
-#define CPUID_STDEXT2_MOVDIRI 0x08000000
+#define CPUID_STDEXT2_PREFETCHWT1 0x00000001
+#define CPUID_STDEXT2_AVX512VBMI 0x00000002
+#define CPUID_STDEXT2_UMIP 0x00000004
+#define CPUID_STDEXT2_PKU 0x00000008
+#define CPUID_STDEXT2_OSPKE 0x00000010
+#define CPUID_STDEXT2_WAITPKG 0x00000020
+#define CPUID_STDEXT2_AVX512VBMI2 0x00000040
+#define CPUID_STDEXT2_GFNI 0x00000100
+#define CPUID_STDEXT2_VAES 0x00000200
+#define CPUID_STDEXT2_VPCLMULQDQ 0x00000400
+#define CPUID_STDEXT2_AVX512VNNI 0x00000800
+#define CPUID_STDEXT2_AVX512BITALG 0x00001000
+#define CPUID_STDEXT2_AVX512VPOPCNTDQ 0x00004000
+#define CPUID_STDEXT2_RDPID 0x00400000
+#define CPUID_STDEXT2_CLDEMOTE 0x02000000
+#define CPUID_STDEXT2_MOVDIRI 0x08000000
#define CPUID_STDEXT2_MOVDIRI64B 0x10000000
-#define CPUID_STDEXT2_SGXLC 0x40000000
+#define CPUID_STDEXT2_ENQCMD 0x20000000
+#define CPUID_STDEXT2_SGXLC 0x40000000
/*
* CPUID instruction 7 Structured Extended Features, leaf 0 edx info
*/
-#define CPUID_STDEXT3_MD_CLEAR 0x00000400
-#define CPUID_STDEXT3_TSXFA 0x00002000
-#define CPUID_STDEXT3_IBPB 0x04000000
-#define CPUID_STDEXT3_STIBP 0x08000000
-#define CPUID_STDEXT3_L1D_FLUSH 0x10000000
-#define CPUID_STDEXT3_ARCH_CAP 0x20000000
-#define CPUID_STDEXT3_CORE_CAP 0x40000000
-#define CPUID_STDEXT3_SSBD 0x80000000
+#define CPUID_STDEXT3_AVX5124VNNIW 0x00000004
+#define CPUID_STDEXT3_AVX5124FMAPS 0x00000008
+#define CPUID_STDEXT3_AVX512VP2INTERSECT 0x00000100
+#define CPUID_STDEXT3_MD_CLEAR 0x00000400
+#define CPUID_STDEXT3_TSXFA 0x00002000
+#define CPUID_STDEXT3_PCONFIG 0x00040000
+#define CPUID_STDEXT3_IBPB 0x04000000
+#define CPUID_STDEXT3_STIBP 0x08000000
+#define CPUID_STDEXT3_L1D_FLUSH 0x10000000
+#define CPUID_STDEXT3_ARCH_CAP 0x20000000
+#define CPUID_STDEXT3_CORE_CAP 0x40000000
+#define CPUID_STDEXT3_SSBD 0x80000000
/* MSR IA32_ARCH_CAP(ABILITIES) bits */
#define IA32_ARCH_CAP_RDCL_NO 0x00000001
Modified: head/sys/x86/x86/identcpu.c
==============================================================================
--- head/sys/x86/x86/identcpu.c Wed May 22 23:19:20 2019 (r348129)
+++ head/sys/x86/x86/identcpu.c Wed May 22 23:22:36 2019 (r348130)
@@ -983,11 +983,18 @@ printcpuinfo(void)
"\004PKU"
"\005OSPKE"
"\006WAITPKG"
+ "\007AVX512VBMI2"
"\011GFNI"
+ "\012VAES"
+ "\013VPCLMULQDQ"
+ "\014AVX512VNNI"
+ "\015AVX512BITALG"
+ "\016AVX512VPOPCNTDQ"
"\027RDPID"
"\032CLDEMOTE"
"\034MOVDIRI"
"\035MOVDIRI64B"
+ "\036ENQCMD"
"\037SGXLC"
);
}
@@ -996,8 +1003,12 @@ printcpuinfo(void)
printf("\n Structured Extended Features3=0x%b",
cpu_stdext_feature3,
"\020"
+ "\003AVX512_4VNNIW"
+ "\004AVX512_4FMAPS"
+ "\011AVX512VP2INTERSECT"
"\013MD_CLEAR"
"\016TSXFA"
+ "\023PCONFIG"
"\033IBPB"
"\034STIBP"
"\035L1DFL"
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