Author: manu
Date: Mon Aug  5 17:01:19 2019
New Revision: 350595
URL: https://svnweb.freebsd.org/changeset/base/350595

Log:
  MFC r342924, r343749-r343750, r343874, r344893-r344895, r345711
  
  r342924:
  dtb: allwinner: Add orangepi-pc to the build
  
  PR:           226011
  Submitted by: Greg V <greg@unrelenting.technology>
  
  r343749:
  release: arm64: rpi3: Install the RPI3B+ DTB file
  
  We should use the correct DTB file otherwise the firmware uses
  the RPI3B one.
  
  r343750:
  release: arm64: pine64-lts: Use the newly created u-boot-pine64-lts port
  
  In U-Boot 2019.01 there is now a config for this board, use it for the
  release image.
  
  r343874:
  mtree: Add dtb subdir to the mtree file
  
  makefs will fails otherwise
  
  Reported by:  emaste
  
  r344893:
  arm: allwinner: Fix NM clock recalc
  
  If the NM clock is using a fractional divider the formula isn't the same.
  
  r344894:
  arm64: allwinner: Add CCU DE2
  
  The Display Engine 2 have it's own Clock and Control Unit, add support
  for it.
  
  r344895:
  arm64: allwinner: a64: Add TCON clock
  
  The tcon clock need a mux table for it's parent, for now just
  list the parents twice.
  
  r345711:
  arm: allwinner: clk: Fix nm_recalc
  
  When comparing best frequencies use the absolute value.
  If we do not do that we end up choosing an always lower value than
  the best one if the exact freq cannot be met.

Added:
  stable/12/sys/arm/allwinner/clkng/ccu_de2.c
     - copied unchanged from r344895, head/sys/arm/allwinner/clkng/ccu_de2.c
Modified:
  stable/12/etc/mtree/BSD.root.dist
  stable/12/release/arm64/PINE64-LTS.conf
  stable/12/release/arm64/RPI3.conf
  stable/12/sys/arm/allwinner/clkng/aw_clk_nm.c
  stable/12/sys/arm/allwinner/clkng/ccu_a64.c
  stable/12/sys/conf/files.arm64
  stable/12/sys/modules/dtb/allwinner/Makefile
Directory Properties:
  stable/12/   (props changed)

Modified: stable/12/etc/mtree/BSD.root.dist
==============================================================================
--- stable/12/etc/mtree/BSD.root.dist   Mon Aug  5 16:56:11 2019        
(r350594)
+++ stable/12/etc/mtree/BSD.root.dist   Mon Aug  5 17:01:19 2019        
(r350595)
@@ -11,7 +11,11 @@
         defaults
         ..
         dtb
+            allwinner             tags=package=runtime
+            ..
             overlays              tags=package=runtime
+            ..
+            rockchip              tags=package=runtime
             ..
         ..
         firmware

Modified: stable/12/release/arm64/PINE64-LTS.conf
==============================================================================
--- stable/12/release/arm64/PINE64-LTS.conf     Mon Aug  5 16:56:11 2019        
(r350594)
+++ stable/12/release/arm64/PINE64-LTS.conf     Mon Aug  5 17:01:19 2019        
(r350595)
@@ -6,7 +6,7 @@
 EMBEDDED_TARGET_ARCH="aarch64"
 EMBEDDED_TARGET="arm64"
 EMBEDDEDBUILD=1
-EMBEDDEDPORTS="sysutils/u-boot-sopine"
+EMBEDDEDPORTS="sysutils/u-boot-pine64-lts"
 FAT_SIZE="54m -b 1m"
 FAT_TYPE="16"
 IMAGE_SIZE="3072M"
@@ -18,7 +18,7 @@ FDT_OVERLAYS="sun50i-a64-sid,sun50i-a64-ths,sun50i-a64
 export BOARDNAME="PINE64-LTS"
 
 arm_install_uboot() {
-       UBOOT_DIR="/usr/local/share/u-boot/u-boot-sopine"
+       UBOOT_DIR="/usr/local/share/u-boot/u-boot-pine64-lts"
        UBOOT_FILES="u-boot-sunxi-with-spl.bin"
        chroot ${CHROOTDIR} dd if=${UBOOT_DIR}/${UBOOT_FILES} \
                of=/dev/${mddev} bs=1k seek=8 conv=sync

Modified: stable/12/release/arm64/RPI3.conf
==============================================================================
--- stable/12/release/arm64/RPI3.conf   Mon Aug  5 16:56:11 2019        
(r350594)
+++ stable/12/release/arm64/RPI3.conf   Mon Aug  5 17:01:19 2019        
(r350595)
@@ -4,7 +4,7 @@
 #
 
 DTB_DIR="/usr/local/share/rpi-firmware"
-DTB="bcm2710-rpi-3-b.dtb"
+DTB="bcm2710-rpi-3-b.dtb bcm2710-rpi-3-b-plus.dtb"
 EMBEDDED_TARGET_ARCH="aarch64"
 EMBEDDED_TARGET="arm64"
 EMBEDDEDBUILD=1

Modified: stable/12/sys/arm/allwinner/clkng/aw_clk_nm.c
==============================================================================
--- stable/12/sys/arm/allwinner/clkng/aw_clk_nm.c       Mon Aug  5 16:56:11 
2019        (r350594)
+++ stable/12/sys/arm/allwinner/clkng/aw_clk_nm.c       Mon Aug  5 17:01:19 
2019        (r350595)
@@ -155,7 +155,7 @@ aw_clk_nm_find_best(struct aw_clk_nm_sc *sc, uint64_t 
        for (m = min_m; m <= max_m; ) {
                for (n = min_m; n <= max_n; ) {
                        cur = fparent / n / m;
-                       if ((*fout - cur) < (*fout - best)) {
+                       if (abs(*fout - cur) < abs(*fout - best)) {
                                best = cur;
                                *factor_n = n;
                                *factor_m = m;
@@ -300,7 +300,11 @@ aw_clk_nm_recalc(struct clknode *clk, uint64_t *freq)
                else
                        prediv = 1;
 
-               *freq = *freq / prediv / n / m;
+               /* For FRAC NM the formula is freq_parent * n / m */
+               if (sc->flags & AW_CLK_HAS_FRAC)
+                       *freq = *freq * n / m;
+               else
+                       *freq = *freq / prediv / n / m;
        }
 
        return (0);

Modified: stable/12/sys/arm/allwinner/clkng/ccu_a64.c
==============================================================================
--- stable/12/sys/arm/allwinner/clkng/ccu_a64.c Mon Aug  5 16:56:11 2019        
(r350594)
+++ stable/12/sys/arm/allwinner/clkng/ccu_a64.c Mon Aug  5 17:01:19 2019        
(r350595)
@@ -289,6 +289,15 @@ NM_CLK_WITH_FRAC(pll_video0_clk,
     AW_CLK_HAS_LOCK,                           /* flags */
     270000000, 297000000,                      /* freq0, freq1 */
     24, 25);                                   /* mode sel, freq sel */
+static const char *pll_video0_2x_parents[] = {"pll_video0"};
+FIXED_CLK(pll_video0_2x_clk,
+    CLK_PLL_VIDEO0_2X,                 /* id */
+    "pll_video0-2x",                   /* name */
+    pll_video0_2x_parents,             /* parent */
+    0,                                 /* freq */
+    2,                                 /* mult */
+    1,                                 /* div */
+    0);                                        /* flags */
 
 static const char *pll_ve_parents[] = {"osc24M"};
 NM_CLK_WITH_FRAC(pll_ve_clk,
@@ -631,6 +640,15 @@ NM_CLK(de_clk,
     AW_CLK_HAS_MUX | AW_CLK_HAS_GATE);         /* flags */
 
 /* TCON0/1 Needs mux table */
+static const char *tcon1_parents[] = {"pll_video0", "pll_video0", 
"pll_video1"};
+NM_CLK(tcon1_clk,
+  CLK_TCON1, "tcon1", tcon1_parents,
+  0x11C,
+  0, 0, 1, AW_CLK_FACTOR_FIXED,
+  0, 4, 0, 0,
+  24, 2,
+  31,
+  AW_CLK_HAS_MUX | AW_CLK_HAS_GATE);
 
 static const char *deinterlace_parents[] = {"pll_periph0", "pll_periph1"};
 NM_CLK(deinterlace_clk,
@@ -727,6 +745,7 @@ static struct aw_ccung_clk a64_ccu_clks[] = {
        { .type = AW_CLK_NM, .clk.nm = &spdif_clk},
        { .type = AW_CLK_NM, .clk.nm = &dram_clk},
        { .type = AW_CLK_NM, .clk.nm = &de_clk},
+       { .type = AW_CLK_NM, .clk.nm = &tcon1_clk},
        { .type = AW_CLK_NM, .clk.nm = &deinterlace_clk},
        { .type = AW_CLK_NM, .clk.nm = &csi_sclk_clk},
        { .type = AW_CLK_NM, .clk.nm = &csi_mclk_clk},
@@ -750,6 +769,7 @@ static struct aw_ccung_clk a64_ccu_clks[] = {
        { .type = AW_CLK_FIXED, .clk.fixed = &pll_audio_2x_clk},
        { .type = AW_CLK_FIXED, .clk.fixed = &pll_audio_4x_clk},
        { .type = AW_CLK_FIXED, .clk.fixed = &pll_audio_8x_clk},
+       { .type = AW_CLK_FIXED, .clk.fixed = &pll_video0_2x_clk},
 };
 
 static struct aw_clk_init a64_init_clks[] = {

Copied: stable/12/sys/arm/allwinner/clkng/ccu_de2.c (from r344895, 
head/sys/arm/allwinner/clkng/ccu_de2.c)
==============================================================================
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ stable/12/sys/arm/allwinner/clkng/ccu_de2.c Mon Aug  5 17:01:19 2019        
(r350595, copy of r344895, head/sys/arm/allwinner/clkng/ccu_de2.c)
@@ -0,0 +1,167 @@
+/*-
+ * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
+ *
+ * Copyright (c) 2018 Emmanuel Vadot <m...@freebsd.org>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/bus.h>
+#include <sys/rman.h>
+#include <sys/kernel.h>
+#include <sys/module.h>
+#include <machine/bus.h>
+
+#include <dev/fdt/simplebus.h>
+
+#include <dev/ofw/ofw_bus.h>
+#include <dev/ofw/ofw_bus_subr.h>
+
+#include "opt_soc.h"
+
+#include <dev/extres/clk/clk_div.h>
+#include <dev/extres/clk/clk_fixed.h>
+#include <dev/extres/clk/clk_mux.h>
+
+#include <arm/allwinner/clkng/aw_ccung.h>
+
+#include <gnu/dts/include/dt-bindings/clock/sun8i-de2.h>
+#include <gnu/dts/include/dt-bindings/reset/sun8i-de2.h>
+
+/* Non exported clocks */
+#define        CLK_MIXER0_DIV  3
+#define        CLK_MIXER1_DIV  4
+#define        CLK_WB_DIV      5
+
+static struct aw_ccung_reset de2_ccu_resets[] = {
+       CCU_RESET(RST_MIXER0, 0x08, 0)
+       CCU_RESET(RST_MIXER1, 0x08, 1)
+       CCU_RESET(RST_WB, 0x08, 2)
+};
+
+static struct aw_ccung_gate de2_ccu_gates[] = {
+       CCU_GATE(CLK_BUS_MIXER0, "mixer0", "mixer0-div", 0x00, 0)
+       CCU_GATE(CLK_BUS_MIXER1, "mixer1", "mixer1-div", 0x00, 1)
+       CCU_GATE(CLK_BUS_WB, "wb", "wb-div", 0x00, 2)
+
+       CCU_GATE(CLK_MIXER0, "bus-mixer0", "bus-de", 0x04, 0)
+       CCU_GATE(CLK_MIXER1, "bus-mixer1", "bus-de", 0x04, 1)
+       CCU_GATE(CLK_WB, "bus-wb", "bus-de", 0x04, 2)
+};
+
+static const char *div_parents[] = {"de"};
+
+NM_CLK(mixer0_div_clk,
+    CLK_MIXER0_DIV,                    /* id */
+    "mixer0-div", div_parents,         /* names, parents */
+    0x0C,                              /* offset */
+    0, 0, 1, AW_CLK_FACTOR_FIXED,      /* N factor (fake)*/
+    0, 4, 0, 0,                                /* M flags */
+    0, 0,                              /* mux */
+    0,                                 /* gate */
+    AW_CLK_SCALE_CHANGE);      /* flags */
+
+NM_CLK(mixer1_div_clk,
+    CLK_MIXER1_DIV,                    /* id */
+    "mixer1-div", div_parents,         /* names, parents */
+    0x0C,                              /* offset */
+    0, 0, 1, AW_CLK_FACTOR_FIXED,      /* N factor (fake)*/
+    4, 4, 0, 0,                                /* M flags */
+    0, 0,                              /* mux */
+    0,                                 /* gate */
+    AW_CLK_SCALE_CHANGE);      /* flags */
+
+NM_CLK(wb_div_clk,
+    CLK_WB_DIV,                                /* id */
+    "wb-div", div_parents,             /* names, parents */
+    0x0C,                              /* offset */
+    0, 0, 1, AW_CLK_FACTOR_FIXED,      /* N factor (fake)*/
+    8, 4, 0, 0,                                /* M flags */
+    0, 0,                              /* mux */
+    0,                                 /* gate */
+    AW_CLK_SCALE_CHANGE);      /* flags */
+
+static struct aw_ccung_clk de2_ccu_clks[] = {
+       { .type = AW_CLK_NM, .clk.nm = &mixer0_div_clk},
+       { .type = AW_CLK_NM, .clk.nm = &mixer1_div_clk},
+       { .type = AW_CLK_NM, .clk.nm = &wb_div_clk},
+};
+
+static struct ofw_compat_data compat_data[] = {
+       {"allwinner,sun50i-a64-de2-clk", 1},
+       {"allwinner,sun50i-h5-de2-clk", 1},
+       {NULL,             0}
+};
+
+static int
+ccu_de2_probe(device_t dev)
+{
+
+       if (!ofw_bus_status_okay(dev))
+               return (ENXIO);
+
+       if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
+               return (ENXIO);
+
+       device_set_desc(dev, "Allwinner DE2 Clock Control Unit");
+       return (BUS_PROBE_DEFAULT);
+}
+
+static int
+ccu_de2_attach(device_t dev)
+{
+       struct aw_ccung_softc *sc;
+
+       sc = device_get_softc(dev);
+
+       sc->resets = de2_ccu_resets;
+       sc->nresets = nitems(de2_ccu_resets);
+       sc->gates = de2_ccu_gates;
+       sc->ngates = nitems(de2_ccu_gates);
+       sc->clks = de2_ccu_clks;
+       sc->nclks = nitems(de2_ccu_clks);
+
+       return (aw_ccung_attach(dev));
+}
+
+static device_method_t ccu_de2_methods[] = {
+       /* Device interface */
+       DEVMETHOD(device_probe,         ccu_de2_probe),
+       DEVMETHOD(device_attach,        ccu_de2_attach),
+
+       DEVMETHOD_END
+};
+
+static devclass_t ccu_de2ng_devclass;
+
+DEFINE_CLASS_1(ccu_de2, ccu_de2_driver, ccu_de2_methods,
+  sizeof(struct aw_ccung_softc), aw_ccung_driver);
+
+EARLY_DRIVER_MODULE(ccu_de2, simplebus, ccu_de2_driver,
+    ccu_de2ng_devclass, 0, 0, BUS_PASS_BUS + BUS_PASS_ORDER_LAST);

Modified: stable/12/sys/conf/files.arm64
==============================================================================
--- stable/12/sys/conf/files.arm64      Mon Aug  5 16:56:11 2019        
(r350594)
+++ stable/12/sys/conf/files.arm64      Mon Aug  5 17:01:19 2019        
(r350595)
@@ -51,6 +51,7 @@ arm/allwinner/clkng/aw_clk_prediv_mux.c       optional        
aw_cc
 arm/allwinner/clkng/ccu_a64.c          optional        soc_allwinner_a64 
aw_ccu fdt
 arm/allwinner/clkng/ccu_h3.c           optional        soc_allwinner_h5 aw_ccu 
fdt
 arm/allwinner/clkng/ccu_sun8i_r.c      optional        aw_ccu fdt
+arm/allwinner/clkng/ccu_de2.c          optional        aw_ccu fdt
 
 # Allwinner padconf files
 arm/allwinner/a64/a64_padconf.c        optional        soc_allwinner_a64 fdt

Modified: stable/12/sys/modules/dtb/allwinner/Makefile
==============================================================================
--- stable/12/sys/modules/dtb/allwinner/Makefile        Mon Aug  5 16:56:11 
2019        (r350594)
+++ stable/12/sys/modules/dtb/allwinner/Makefile        Mon Aug  5 17:01:19 
2019        (r350595)
@@ -20,6 +20,7 @@ DTS=  \
        sun8i-h3-nanopi-m1-plus.dts \
        sun8i-h3-nanopi-neo.dts \
        sun8i-h3-orangepi-one.dts \
+       sun8i-h3-orangepi-pc.dts \
        sun8i-h3-orangepi-plus2e.dts
 
 DTSO=  sun8i-a83t-sid.dtso \
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