Author: manu
Date: Wed Mar 4 20:52:59 2020
New Revision: 358642
URL: https://svnweb.freebsd.org/changeset/base/358642
Log:
MFC r354088:
arm64: rockchip: Add rk_dwc3 driver
This is a simplebus like driver that attaches the dwc3 child node and
enable the clocks needed for the module.
Added:
stable/12/sys/arm64/rockchip/rk_dwc3.c
- copied unchanged from r354088, head/sys/arm64/rockchip/rk_dwc3.c
Modified:
stable/12/sys/arm64/conf/GENERIC
stable/12/sys/conf/files.arm64
Directory Properties:
stable/12/ (props changed)
Modified: stable/12/sys/arm64/conf/GENERIC
==============================================================================
--- stable/12/sys/arm64/conf/GENERIC Wed Mar 4 20:48:29 2020
(r358641)
+++ stable/12/sys/arm64/conf/GENERIC Wed Mar 4 20:52:59 2020
(r358642)
@@ -186,6 +186,7 @@ device ohci # OHCI USB
interface
device ehci # EHCI USB interface (USB 2.0)
device ehci_mv # Marvell EHCI USB interface
device xhci # XHCI PCI->USB interface (USB 3.0)
+device rk_dwc3 # Rockchip DWC3 controller
device usb # USB Bus (required)
device ukbd # Keyboard
device umass # Disks/Mass storage - Requires scbus
and da
Copied: stable/12/sys/arm64/rockchip/rk_dwc3.c (from r354088,
head/sys/arm64/rockchip/rk_dwc3.c)
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ stable/12/sys/arm64/rockchip/rk_dwc3.c Wed Mar 4 20:52:59 2020
(r358642, copy of r354088, head/sys/arm64/rockchip/rk_dwc3.c)
@@ -0,0 +1,201 @@
+/*-
+ * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
+ *
+ * Copyright (c) 2019 Emmanuel Vadot <m...@freebsd.org>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+/*
+ * Rockchip DWC3 glue
+ */
+
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/bus.h>
+#include <sys/rman.h>
+#include <sys/kernel.h>
+#include <sys/module.h>
+#include <sys/gpio.h>
+#include <machine/bus.h>
+
+
+#include <dev/fdt/simplebus.h>
+
+#include <dev/fdt/fdt_common.h>
+#include <dev/ofw/ofw_bus.h>
+#include <dev/ofw/ofw_bus_subr.h>
+#include <dev/ofw/ofw_subr.h>
+
+#include <dev/extres/clk/clk.h>
+#include <dev/extres/hwreset/hwreset.h>
+#include <dev/extres/phy/phy_usb.h>
+#include <dev/extres/syscon/syscon.h>
+
+static struct ofw_compat_data compat_data[] = {
+ { "rockchip,rk3399-dwc3", 1 },
+ { NULL, 0 }
+};
+
+struct rk_dwc3_softc {
+ struct simplebus_softc sc;
+ device_t dev;
+ clk_t clk_ref;
+ clk_t clk_suspend;
+ clk_t clk_bus;
+ clk_t clk_axi_perf;
+ clk_t clk_usb3;
+ clk_t clk_grf;
+ hwreset_t rst_usb3;
+};
+
+static int
+rk_dwc3_probe(device_t dev)
+{
+ phandle_t node;
+
+ if (!ofw_bus_status_okay(dev))
+ return (ENXIO);
+
+ if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
+ return (ENXIO);
+
+ /* Binding says that we need a child node for the actual dwc3
controller */
+ node = ofw_bus_get_node(dev);
+ if (OF_child(node) <= 0)
+ return (ENXIO);
+
+ device_set_desc(dev, "Rockchip RK3399 DWC3");
+ return (BUS_PROBE_DEFAULT);
+}
+
+static int
+rk_dwc3_attach(device_t dev)
+{
+ struct rk_dwc3_softc *sc;
+ device_t cdev;
+ phandle_t node, child;
+ int err;
+
+ sc = device_get_softc(dev);
+ sc->dev = dev;
+ node = ofw_bus_get_node(dev);
+
+ /* Mandatory clocks */
+ if (clk_get_by_ofw_name(dev, 0, "ref_clk", &sc->clk_ref) != 0) {
+ device_printf(dev, "Cannot get ref_clk clock\n");
+ return (ENXIO);
+ }
+ err = clk_enable(sc->clk_ref);
+ if (err != 0) {
+ device_printf(dev, "Could not enable clock %s\n",
+ clk_get_name(sc->clk_ref));
+ return (ENXIO);
+ }
+ if (clk_get_by_ofw_name(dev, 0, "suspend_clk", &sc->clk_suspend) != 0) {
+ device_printf(dev, "Cannot get suspend_clk clock\n");
+ return (ENXIO);
+ }
+ err = clk_enable(sc->clk_suspend);
+ if (err != 0) {
+ device_printf(dev, "Could not enable clock %s\n",
+ clk_get_name(sc->clk_suspend));
+ return (ENXIO);
+ }
+ if (clk_get_by_ofw_name(dev, 0, "bus_clk", &sc->clk_bus) != 0) {
+ device_printf(dev, "Cannot get bus_clk clock\n");
+ return (ENXIO);
+ }
+ err = clk_enable(sc->clk_bus);
+ if (err != 0) {
+ device_printf(dev, "Could not enable clock %s\n",
+ clk_get_name(sc->clk_bus));
+ return (ENXIO);
+ }
+ if (clk_get_by_ofw_name(dev, 0, "grf_clk", &sc->clk_grf) != 0) {
+ device_printf(dev, "Cannot get grf_clk clock\n");
+ return (ENXIO);
+ }
+ err = clk_enable(sc->clk_grf);
+ if (err != 0) {
+ device_printf(dev, "Could not enable clock %s\n",
+ clk_get_name(sc->clk_grf));
+ return (ENXIO);
+ }
+
+ /* Optional clocks */
+ if (clk_get_by_ofw_name(dev, 0, "aclk_usb3_rksoc_axi_perf",
&sc->clk_axi_perf) == 0) {
+ err = clk_enable(sc->clk_axi_perf);
+ if (err != 0) {
+ device_printf(dev, "Could not enable clock %s\n",
+ clk_get_name(sc->clk_axi_perf));
+ return (ENXIO);
+ }
+ }
+ if (clk_get_by_ofw_name(dev, 0, "aclk_usb3", &sc->clk_usb3) == 0) {
+ err = clk_enable(sc->clk_usb3);
+ if (err != 0) {
+ device_printf(dev, "Could not enable clock %s\n",
+ clk_get_name(sc->clk_usb3));
+ return (ENXIO);
+ }
+ }
+
+ /* Put module out of reset */
+ if (hwreset_get_by_ofw_name(dev, node, "usb3-otg", &sc->rst_usb3) == 0)
{
+ if (hwreset_deassert(sc->rst_usb3) != 0) {
+ device_printf(dev, "Cannot deassert reset\n");
+ return (ENXIO);
+ }
+ }
+
+ simplebus_init(dev, node);
+ if (simplebus_fill_ranges(node, &sc->sc) < 0) {
+ device_printf(dev, "could not get ranges\n");
+ return (ENXIO);
+ }
+
+ for (child = OF_child(node); child > 0; child = OF_peer(child)) {
+ cdev = simplebus_add_device(dev, child, 0, NULL, -1, NULL);
+ if (cdev != NULL)
+ device_probe_and_attach(cdev);
+ }
+
+ return (bus_generic_attach(dev));
+}
+
+static device_method_t rk_dwc3_methods[] = {
+ /* Device interface */
+ DEVMETHOD(device_probe, rk_dwc3_probe),
+ DEVMETHOD(device_attach, rk_dwc3_attach),
+
+ DEVMETHOD_END
+};
+
+static devclass_t rk_dwc3_devclass;
+
+DEFINE_CLASS_1(rk_dwc3, rk_dwc3_driver, rk_dwc3_methods,
+ sizeof(struct rk_dwc3_softc), simplebus_driver);
+DRIVER_MODULE(rk_dwc3, simplebus, rk_dwc3_driver, rk_dwc3_devclass, 0, 0);
Modified: stable/12/sys/conf/files.arm64
==============================================================================
--- stable/12/sys/conf/files.arm64 Wed Mar 4 20:48:29 2020
(r358641)
+++ stable/12/sys/conf/files.arm64 Wed Mar 4 20:52:59 2020
(r358642)
@@ -279,6 +279,7 @@ cddl/dev/fbt/aarch64/fbt_isa.c
optional dtrace_fbt
# RockChip Drivers
arm64/rockchip/rk3399_emmcphy.c optional fdt rk_emmcphy
soc_rockchip_rk3399
+arm64/rockchip/rk_dwc3.c optional fdt rk_dwc3 soc_rockchip_rk3399
arm64/rockchip/rk_i2c.c optional fdt rk_i2c
soc_rockchip_rk3328 | fdt rk_i2c soc_rockchip_rk3399
arm64/rockchip/rk805.c optional fdt rk805 soc_rockchip_rk3328
| fdt rk805 soc_rockchip_rk3399
arm64/rockchip/rk_grf.c optional fdt
soc_rockchip_rk3328 | fdt soc_rockchip_rk3399
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