Author: erj Date: Tue May 26 23:35:10 2020 New Revision: 361541 URL: https://svnweb.freebsd.org/changeset/base/361541
Log: ice(4): Introduce new driver for Intel E800 Ethernet controllers The ice(4) driver is the driver for the Intel E8xx series Ethernet controllers; currently with codenames Columbiaville and Columbia Park. These new controllers support 100G speeds, as well as introducing more queues, better virtualization support, and more offload capabilities. Future work will enable virtual functions (like in ixl(4)) and the other functionality outlined above. For full functionality, the kernel should be compiled with "device ice_ddp" like in the amd64 NOTES file, and/or ice_ddp_load="YES" should be added to /boot/loader.conf so that the DDP package file included in this commit can be downloaded to the adapter. Otherwise, the adapter will fall back to a single queue mode with limited functionality. A man page for this driver will be forthcoming. MFC after: 1 month Relnotes: yes Sponsored by: Intel Corporation Differential Revision: https://reviews.freebsd.org/D21959 Added: head/sys/contrib/dev/ice/ head/sys/contrib/dev/ice/LICENSE (contents, props changed) head/sys/contrib/dev/ice/README (contents, props changed) head/sys/contrib/dev/ice/ice-1.3.9.0.pkg (contents, props changed) head/sys/dev/ice/ head/sys/dev/ice/ice_adminq_cmd.h (contents, props changed) head/sys/dev/ice/ice_alloc.h (contents, props changed) head/sys/dev/ice/ice_bitops.h (contents, props changed) head/sys/dev/ice/ice_common.c (contents, props changed) head/sys/dev/ice/ice_common.h (contents, props changed) head/sys/dev/ice/ice_common_sysctls.h (contents, props changed) head/sys/dev/ice/ice_common_txrx.h (contents, props changed) head/sys/dev/ice/ice_controlq.c (contents, props changed) head/sys/dev/ice/ice_controlq.h (contents, props changed) head/sys/dev/ice/ice_dcb.c (contents, props changed) head/sys/dev/ice/ice_dcb.h (contents, props changed) head/sys/dev/ice/ice_devids.h (contents, props changed) head/sys/dev/ice/ice_drv_info.h (contents, props changed) head/sys/dev/ice/ice_features.h (contents, props changed) head/sys/dev/ice/ice_flex_pipe.c (contents, props changed) head/sys/dev/ice/ice_flex_pipe.h (contents, props changed) head/sys/dev/ice/ice_flex_type.h (contents, props changed) head/sys/dev/ice/ice_flow.c (contents, props changed) head/sys/dev/ice/ice_flow.h (contents, props changed) head/sys/dev/ice/ice_hw_autogen.h (contents, props changed) head/sys/dev/ice/ice_iflib.h (contents, props changed) head/sys/dev/ice/ice_iflib_recovery_txrx.c (contents, props changed) head/sys/dev/ice/ice_iflib_sysctls.h (contents, props changed) head/sys/dev/ice/ice_iflib_txrx.c (contents, props changed) head/sys/dev/ice/ice_lan_tx_rx.h (contents, props changed) head/sys/dev/ice/ice_lib.c (contents, props changed) head/sys/dev/ice/ice_lib.h (contents, props changed) head/sys/dev/ice/ice_nvm.c (contents, props changed) head/sys/dev/ice/ice_nvm.h (contents, props changed) head/sys/dev/ice/ice_opts.h (contents, props changed) head/sys/dev/ice/ice_osdep.c (contents, props changed) head/sys/dev/ice/ice_osdep.h (contents, props changed) head/sys/dev/ice/ice_protocol_type.h (contents, props changed) head/sys/dev/ice/ice_resmgr.c (contents, props changed) head/sys/dev/ice/ice_resmgr.h (contents, props changed) head/sys/dev/ice/ice_rss.h (contents, props changed) head/sys/dev/ice/ice_sbq_cmd.h (contents, props changed) head/sys/dev/ice/ice_sched.c (contents, props changed) head/sys/dev/ice/ice_sched.h (contents, props changed) head/sys/dev/ice/ice_sriov.c (contents, props changed) head/sys/dev/ice/ice_sriov.h (contents, props changed) head/sys/dev/ice/ice_status.h (contents, props changed) head/sys/dev/ice/ice_strings.c (contents, props changed) head/sys/dev/ice/ice_switch.c (contents, props changed) head/sys/dev/ice/ice_switch.h (contents, props changed) head/sys/dev/ice/ice_type.h (contents, props changed) head/sys/dev/ice/if_ice_iflib.c (contents, props changed) head/sys/dev/ice/virtchnl.h (contents, props changed) head/sys/dev/ice/virtchnl_inline_ipsec.h (contents, props changed) head/sys/modules/ice/ head/sys/modules/ice/Makefile (contents, props changed) head/sys/modules/ice_ddp/ head/sys/modules/ice_ddp/Makefile (contents, props changed) head/tools/kerneldoc/subsys/Doxyfile-dev_ice (contents, props changed) Modified: head/MAINTAINERS head/sys/amd64/conf/GENERIC head/sys/amd64/conf/NOTES head/sys/arm64/conf/NOTES head/sys/conf/files.amd64 head/sys/conf/files.arm64 head/sys/modules/Makefile Modified: head/MAINTAINERS ============================================================================== --- head/MAINTAINERS Tue May 26 23:12:57 2020 (r361540) +++ head/MAINTAINERS Tue May 26 23:35:10 2020 (r361541) @@ -99,10 +99,12 @@ sys/compat/linuxkpi hselasky If in doubt, ask. #x11 phabricator group. (to avoid drm graphics drivers impact) +sys/contrib/dev/ice erj Pre-commit phabricator review requested. sys/contrib/ipfilter cy Pre-commit review requested. sys/dev/e1000 erj Pre-commit phabricator review requested. sys/dev/ixgbe erj Pre-commit phabricator review requested. sys/dev/ixl erj Pre-commit phabricator review requested. +sys/dev/ice erj Pre-commit phabricator review requested. sys/dev/sound/usb hselasky If in doubt, ask. sys/dev/usb hselasky If in doubt, ask. sys/dev/xen royger Pre-commit review recommended. Modified: head/sys/amd64/conf/GENERIC ============================================================================== --- head/sys/amd64/conf/GENERIC Tue May 26 23:12:57 2020 (r361540) +++ head/sys/amd64/conf/GENERIC Tue May 26 23:35:10 2020 (r361541) @@ -245,6 +245,7 @@ device ix # Intel PRO/10GbE PCIE PF Ethernet device ixv # Intel PRO/10GbE PCIE VF Ethernet device ixl # Intel 700 Series Physical Function device iavf # Intel Adaptive Virtual Function +device ice # Intel 800 Series Physical Function device vmx # VMware VMXNET3 Ethernet # PCI Ethernet NICs. Modified: head/sys/amd64/conf/NOTES ============================================================================== --- head/sys/amd64/conf/NOTES Tue May 26 23:12:57 2020 (r361540) +++ head/sys/amd64/conf/NOTES Tue May 26 23:35:10 2020 (r361541) @@ -291,6 +291,8 @@ device cpufreq # bxe: Broadcom NetXtreme II (BCM5771X/BCM578XX) PCIe 10Gb Ethernet # adapters. +# ice: Intel 800 Series Physical Function +# Requires the ice_ddp module for full functionality # ipw: Intel PRO/Wireless 2100 IEEE 802.11 adapter # Requires the ipw firmware module # iwi: Intel PRO/Wireless 2200BG/2225BG/2915ABG IEEE 802.11 adapters @@ -316,6 +318,8 @@ device iwi # Intel 2200BG/2225BG/2915ABG wireless NI device iwn # Intel 4965/1000/5000/6000 wireless NICs. device ixl # Intel 700 Series Physical Function device iavf # Intel Adaptive Virtual Function +device ice # Intel 800 Series Physical Function +device ice_ddp # Intel 800 Series DDP Package device mthca # Mellanox HCA InfiniBand device mlx4 # Shared code module between IB and Ethernet device mlx4ib # Mellanox ConnectX HCA InfiniBand Modified: head/sys/arm64/conf/NOTES ============================================================================== --- head/sys/arm64/conf/NOTES Tue May 26 23:12:57 2020 (r361540) +++ head/sys/arm64/conf/NOTES Tue May 26 23:35:10 2020 (r361541) @@ -83,6 +83,8 @@ device vnic # Cavium ThunderX NIC device al_eth # Annapurna Alpine Ethernet NIC device dwc_rk # Rockchip Designware device dwc_socfpga # Altera SOCFPGA Ethernet MAC +device ice # Intel 800 Series Physical Function +device ice_ddp # Intel 800 Series DDP Package # Etherswitch devices device e6000sw # Marvell mv88e6085 based switches Modified: head/sys/conf/files.amd64 ============================================================================== --- head/sys/conf/files.amd64 Tue May 26 23:12:57 2020 (r361540) +++ head/sys/conf/files.amd64 Tue May 26 23:35:10 2020 (r361541) @@ -144,6 +144,52 @@ dev/agp/agp_via.c optional agp dev/amdgpio/amdgpio.c optional amdgpio dev/hyperv/vmbus/amd64/hyperv_machdep.c optional hyperv dev/hyperv/vmbus/amd64/vmbus_vector.S optional hyperv +dev/ice/if_ice_iflib.c optional ice pci \ + compile-with "${NORMAL_C} -I$S/dev/ice" +dev/ice/ice_lib.c optional ice pci \ + compile-with "${NORMAL_C} -I$S/dev/ice" +dev/ice/ice_osdep.c optional ice pci \ + compile-with "${NORMAL_C} -I$S/dev/ice" +dev/ice/ice_resmgr.c optional ice pci \ + compile-with "${NORMAL_C} -I$S/dev/ice" +dev/ice/ice_strings.c optional ice pci \ + compile-with "${NORMAL_C} -I$S/dev/ice" +dev/ice/ice_iflib_recovery_txrx.c optional ice pci \ + compile-with "${NORMAL_C} -I$S/dev/ice" +dev/ice/ice_iflib_txrx.c optional ice pci \ + compile-with "${NORMAL_C} -I$S/dev/ice" +dev/ice/ice_common.c optional ice pci \ + compile-with "${NORMAL_C} -I$S/dev/ice" +dev/ice/ice_controlq.c optional ice pci \ + compile-with "${NORMAL_C} -I$S/dev/ice" +dev/ice/ice_dcb.c optional ice pci \ + compile-with "${NORMAL_C} -I$S/dev/ice" +dev/ice/ice_flex_pipe.c optional ice pci \ + compile-with "${NORMAL_C} -I$S/dev/ice" +dev/ice/ice_flow.c optional ice pci \ + compile-with "${NORMAL_C} -I$S/dev/ice" +dev/ice/ice_nvm.c optional ice pci \ + compile-with "${NORMAL_C} -I$S/dev/ice" +dev/ice/ice_sched.c optional ice pci \ + compile-with "${NORMAL_C} -I$S/dev/ice" +dev/ice/ice_sriov.c optional ice pci \ + compile-with "${NORMAL_C} -I$S/dev/ice" +dev/ice/ice_switch.c optional ice pci \ + compile-with "${NORMAL_C} -I$S/dev/ice" +ice_ddp.c optional ice_ddp \ + compile-with "${AWK} -f $S/tools/fw_stub.awk ice_ddp.fw:ice_ddp:0x01030900 -mice_ddp -c${.TARGET}" \ + no-implicit-rule before-depend local \ + clean "ice_ddp.c" +ice_ddp.fwo optional ice_ddp \ + dependency "ice_ddp.fw" \ + compile-with "${NORMAL_FWO}" \ + no-implicit-rule \ + clean "ice_ddp.fwo" +ice_ddp.fw optional ice_ddp \ + dependency "$S/contrib/dev/ice/ice-1.3.9.0.pkg" \ + compile-with "${CP} $S/contrib/dev/ice/ice-1.3.9.0.pkg ice_ddp.fw" \ + no-obj no-implicit-rule \ + clean "ice_ddp.fw" dev/ioat/ioat.c optional ioat pci dev/ioat/ioat_test.c optional ioat pci dev/ixl/if_ixl.c optional ixl pci \ Modified: head/sys/conf/files.arm64 ============================================================================== --- head/sys/conf/files.arm64 Tue May 26 23:12:57 2020 (r361540) +++ head/sys/conf/files.arm64 Tue May 26 23:35:10 2020 (r361541) @@ -240,6 +240,52 @@ dev/axgbe/xgbe-dev.c optional axgbe dev/axgbe/xgbe-drv.c optional axgbe dev/axgbe/xgbe-mdio.c optional axgbe dev/cpufreq/cpufreq_dt.c optional cpufreq fdt +dev/ice/if_ice_iflib.c optional ice pci \ + compile-with "${NORMAL_C} -I$S/dev/ice" +dev/ice/ice_lib.c optional ice pci \ + compile-with "${NORMAL_C} -I$S/dev/ice" +dev/ice/ice_osdep.c optional ice pci \ + compile-with "${NORMAL_C} -I$S/dev/ice" +dev/ice/ice_resmgr.c optional ice pci \ + compile-with "${NORMAL_C} -I$S/dev/ice" +dev/ice/ice_strings.c optional ice pci \ + compile-with "${NORMAL_C} -I$S/dev/ice" +dev/ice/ice_iflib_recovery_txrx.c optional ice pci \ + compile-with "${NORMAL_C} -I$S/dev/ice" +dev/ice/ice_iflib_txrx.c optional ice pci \ + compile-with "${NORMAL_C} -I$S/dev/ice" +dev/ice/ice_common.c optional ice pci \ + compile-with "${NORMAL_C} -I$S/dev/ice" +dev/ice/ice_controlq.c optional ice pci \ + compile-with "${NORMAL_C} -I$S/dev/ice" +dev/ice/ice_dcb.c optional ice pci \ + compile-with "${NORMAL_C} -I$S/dev/ice" +dev/ice/ice_flex_pipe.c optional ice pci \ + compile-with "${NORMAL_C} -I$S/dev/ice" +dev/ice/ice_flow.c optional ice pci \ + compile-with "${NORMAL_C} -I$S/dev/ice" +dev/ice/ice_nvm.c optional ice pci \ + compile-with "${NORMAL_C} -I$S/dev/ice" +dev/ice/ice_sched.c optional ice pci \ + compile-with "${NORMAL_C} -I$S/dev/ice" +dev/ice/ice_sriov.c optional ice pci \ + compile-with "${NORMAL_C} -I$S/dev/ice" +dev/ice/ice_switch.c optional ice pci \ + compile-with "${NORMAL_C} -I$S/dev/ice" +ice_ddp.c optional ice_ddp \ + compile-with "${AWK} -f $S/tools/fw_stub.awk ice_ddp.fw:ice_ddp:0x01030900 -mice_ddp -c${.TARGET}" \ + no-implicit-rule before-depend local \ + clean "ice_ddp.c" +ice_ddp.fwo optional ice_ddp \ + dependency "ice_ddp.fw" \ + compile-with "${NORMAL_FWO}" \ + no-implicit-rule \ + clean "ice_ddp.fwo" +ice_ddp.fw optional ice_ddp \ + dependency "$S/contrib/dev/ice/ice-1.3.9.0.pkg" \ + compile-with "${CP} $S/contrib/dev/ice/ice-1.3.9.0.pkg ice_ddp.fw" \ + no-obj no-implicit-rule \ + clean "ice_ddp.fw" dev/iicbus/sy8106a.c optional sy8106a fdt dev/iicbus/twsi/mv_twsi.c optional twsi fdt dev/iicbus/twsi/a10_twsi.c optional twsi fdt Added: head/sys/contrib/dev/ice/LICENSE ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ head/sys/contrib/dev/ice/LICENSE Tue May 26 23:35:10 2020 (r361541) @@ -0,0 +1,41 @@ +Copyright (c) 2006-2018, Intel Corporation. +All rights reserved. + +Redistribution. Redistribution and use in binary form, without +modification, are permitted provided that the following conditions are +met: + +* Redistributions must reproduce the above copyright notice and the + following disclaimer in the documentation and/or other materials + provided with the distribution. +* Neither the name of Intel Corporation nor the names of its suppliers + may be used to endorse or promote products derived from this software + without specific prior written permission. +* No reverse engineering, decompilation, or disassembly of this software + is permitted. + +Limited patent license. Intel Corporation grants a world-wide, +royalty-free, non-exclusive license under patents it now or hereafter +owns or controls to make, have made, use, import, offer to sell and +sell ("Utilize") this software, but solely to the extent that any +such patent is necessary to Utilize the software alone, or in +combination with an operating system licensed under an approved Open +Source license as listed by the Open Source Initiative at +http://opensource.org/licenses. The patent license shall not apply to +any other combinations which include this software. No hardware per +se is licensed hereunder. + +DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND +CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, +BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND +FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR +TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE +USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH +DAMAGE. + + Added: head/sys/contrib/dev/ice/README ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ head/sys/contrib/dev/ice/README Tue May 26 23:35:10 2020 (r361541) @@ -0,0 +1,197 @@ +Dynamic Device Personalization (DDP) Package +============================================ +February 21, 2020 + + +Contents +======== +- Overview +- Safe Mode +- Notes +- Installation & Troubleshooting +- Legal + + +Overview +======== +Adapters based on the Intel(R) Ethernet Controller 800 Series require a Dynamic +Device Personalization (DDP) package file to enable advanced features (such as +dynamic tunneling, Flow Director, RSS, and ADQ). + +DDP allows you to change the packet processing pipeline of a device by applying +a profile package to the device at runtime. Profiles can be used to, for +example, add support for new protocols, change existing protocols, or change +default settings. DDP profiles can also be rolled back without rebooting the +system. + +The DDP package loads during device initialization. The driver checks to see if +the DDP package is present and compatible. If this file exists, the driver will +load it into the device. If the DDP package file is missing or incompatible +with the driver, the driver will go into Safe Mode where it will use the +configuration contained in the device's NVM. See "Safe Mode" later in this +README for more information. + +A general purpose, OS-default DDP package is automatically installed with all +supported Intel Ethernet Controller 800 Series drivers on Microsoft* Windows*, +ESX*, FreeBSD*, and Linux* operating systems. Additional DDP packages are +available to address needs for specific market segments. For example, a +telecommunications (Comms) DDP package is available to support certain +market-specific protocols in addition to the protocols in the OS-default +package. + +The OS-default DDP package supports the following: +- MAC +- EtherType +- VLAN +- IPv4 +- IPv6 +- TCP +- ARP +- UDP +- SCTP +- ICMP +- ICMPv6 +- CTRL +- LLDP +- VXLAN-GPE +- VXLAN (non-GPE) +- Geneve +- GRE +- NVGRE +- RoCEv2 + + +Safe Mode +========= +Safe Mode disables advanced and performance features, and supports only basic +traffic and minimal functionality, such as updating the NVM or downloading a +new driver or DDP package. + +See the Intel(R) Ethernet Adapters and Devices User Guide for more details on +DDP and Safe Mode. + + +Notes +===== +- You cannot update the DDP package if any PF drivers are already loaded. To +overwrite a package, unload all PFs and then reload the driver with the new +package. + +- Except for Linux, you can only use one DDP package per driver, even if you +have more than one device installed that uses the driver. + +- Only the first loaded PF per device can download a package for that device. + +- If you are using DPDK, see the DPDK documentation at https://www.dpdk.org/ +for installation instructions and more information. + + +Installation and Troubleshooting +================================ + +Microsoft* Windows* +------------------- +The DDP package is installed as part of the driver binary. You don't need to +take additional steps to install the DDP package file. + +If you encounter issues with the DDP package file, download the latest driver. + + +ESX +--- +The DDP package is installed as part of the driver binary. You don't need to +take additional steps to install the DDP package file. + +If you encounter issues with the DDP package file, download the latest driver. + + +FreeBSD +------- +The FreeBSD driver automatically installs the default DDP package file during +driver installation. See the ice driver README for general installation and +building instructions. + +The DDP package loads during device initialization. The driver looks for the +ice_ddp module and checks that it contains a valid DDP package file. + +If you encounter issues with the DDP package file, you may need to download an +updated driver or ice_ddp module. See the log messages for more information. + +NOTE: It's important to do 'make install' during initial ice driver +installation so that the driver loads the DDP package automatically. + + +Linux +----- +The Linux driver automatically installs the default DDP package file during +driver installation. See the ice driver README for general installation and +building instructions. + +The DDP package loads during device initialization. The driver looks for +intel/ice/ddp/ice.pkg in your firmware root (typically /lib/firmware/ or +/lib/firmware/updates/) and checks that it contains a valid DDP package file. +The ice.pkg file is a symbolic link to the default DDP package file installed +by the linux-firmware software package or the ice out-of-tree driver +installation. + +If you encounter issues with the DDP package file, you may need to download an +updated driver or DDP package file. See the log messages for more information. + +You can install specific DDP package files for different physical devices in +the same system. To install a specific DDP package: + +1. Download the DDP package file (ice-x.x.x.x.zip) you want for your device. In +addition to licensing information and this README, this zip file contains the +following files: + ice-x.x.x.x.pkg + ice.pkg + +NOTE: The ice.pkg file is a Linux symbolic link file pointing to +ice-x.x.x.x.pkg (in the same path). + +2. Rename the ice-x.x.x.x.pkg file as ice-xxxxxxxxxxxxxxxx.pkg, where +'xxxxxxxxxxxxxxxx' is the unique 64-bit PCI Express device serial number (in +hex) of the device you want the package downloaded on. The filename must +include the complete serial number (including leading zeros) and be all +lowercase. For example, if the 64-bit serial number is b887a3ffffca0568, then +the file name would be ice-b887a3ffffca0568.pkg. + +To find the serial number from the PCI bus address, you can use the following +command: + +# lspci -vv -s af:00.0 | grep -i Serial +Capabilities: [150 v1] Device Serial Number b8-87-a3-ff-ff-ca-05-68 + +You can use the following command to format the serial number without the +dashes: + +# lspci -vv -s af:00.0 | grep -i Serial | awk '{print $7}' | sed s/-//g +b887a3ffffca0568 + +3. Copy the renamed DDP package file to /lib/firmware/updates/intel/ice/ddp/. +If the directory does not yet exist, create it before copying the file. + +4. Unload all of the PFs on the device. + +5. Reload the driver with the new package. + +NOTE: The presence of a device-specific DDP package file overrides the loading +of the default DDP package file (ice.pkg). + + +Legal / Disclaimers +=================== +Copyright (c) 2019 - 2020, Intel Corporation. + +Intel and the Intel logo are trademarks of Intel Corporation or its +subsidiaries in the U.S. and/or other countries. + +*Other names and brands may be claimed as the property of others. + +This software and the related documents are Intel copyrighted materials, and +your use of them is governed by the express license under which they were +provided to you ("License"). Unless the License provides otherwise, you may not +use, modify, copy, publish, distribute, disclose or transmit this software or +the related documents without Intel's prior written permission. +This software and the related documents are provided as is, with no express or +implied warranties, other than those that are expressly stated in the License. Added: head/sys/contrib/dev/ice/ice-1.3.9.0.pkg ============================================================================== Binary file. No diff available. Added: head/sys/dev/ice/ice_adminq_cmd.h ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ head/sys/dev/ice/ice_adminq_cmd.h Tue May 26 23:35:10 2020 (r361541) @@ -0,0 +1,2968 @@ +/* SPDX-License-Identifier: BSD-3-Clause */ +/* Copyright (c) 2020, Intel Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * 3. Neither the name of the Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ +/*$FreeBSD$*/ + +#ifndef _ICE_ADMINQ_CMD_H_ +#define _ICE_ADMINQ_CMD_H_ + +/* This header file defines the Admin Queue commands, error codes and + * descriptor format. It is shared between Firmware and Software. + */ + +#define ICE_MAX_VSI 768 +#define ICE_AQC_TOPO_MAX_LEVEL_NUM 0x9 +#define ICE_AQ_SET_MAC_FRAME_SIZE_MAX 9728 + +struct ice_aqc_generic { + __le32 param0; + __le32 param1; + __le32 addr_high; + __le32 addr_low; +}; + +/* Get version (direct 0x0001) */ +struct ice_aqc_get_ver { + __le32 rom_ver; + __le32 fw_build; + u8 fw_branch; + u8 fw_major; + u8 fw_minor; + u8 fw_patch; + u8 api_branch; + u8 api_major; + u8 api_minor; + u8 api_patch; +}; + +/* Send driver version (indirect 0x0002) */ +struct ice_aqc_driver_ver { + u8 major_ver; + u8 minor_ver; + u8 build_ver; + u8 subbuild_ver; + u8 reserved[4]; + __le32 addr_high; + __le32 addr_low; +}; + +/* Queue Shutdown (direct 0x0003) */ +struct ice_aqc_q_shutdown { + u8 driver_unloading; +#define ICE_AQC_DRIVER_UNLOADING BIT(0) + u8 reserved[15]; +}; + +/* Get Expanded Error Code (0x0005, direct) */ +struct ice_aqc_get_exp_err { + __le32 reason; +#define ICE_AQC_EXPANDED_ERROR_NOT_PROVIDED 0xFFFFFFFF + __le32 identifier; + u8 rsvd[8]; +}; + +/* Request resource ownership (direct 0x0008) + * Release resource ownership (direct 0x0009) + */ +struct ice_aqc_req_res { + __le16 res_id; +#define ICE_AQC_RES_ID_NVM 1 +#define ICE_AQC_RES_ID_SDP 2 +#define ICE_AQC_RES_ID_CHNG_LOCK 3 +#define ICE_AQC_RES_ID_GLBL_LOCK 4 + __le16 access_type; +#define ICE_AQC_RES_ACCESS_READ 1 +#define ICE_AQC_RES_ACCESS_WRITE 2 + + /* Upon successful completion, FW writes this value and driver is + * expected to release resource before timeout. This value is provided + * in milliseconds. + */ + __le32 timeout; +#define ICE_AQ_RES_NVM_READ_DFLT_TIMEOUT_MS 3000 +#define ICE_AQ_RES_NVM_WRITE_DFLT_TIMEOUT_MS 180000 +#define ICE_AQ_RES_CHNG_LOCK_DFLT_TIMEOUT_MS 1000 +#define ICE_AQ_RES_GLBL_LOCK_DFLT_TIMEOUT_MS 3000 + /* For SDP: pin ID of the SDP */ + __le32 res_number; + /* Status is only used for ICE_AQC_RES_ID_GLBL_LOCK */ + __le16 status; +#define ICE_AQ_RES_GLBL_SUCCESS 0 +#define ICE_AQ_RES_GLBL_IN_PROG 1 +#define ICE_AQ_RES_GLBL_DONE 2 + u8 reserved[2]; +}; + +/* Get function capabilities (indirect 0x000A) + * Get device capabilities (indirect 0x000B) + */ +struct ice_aqc_list_caps { + u8 cmd_flags; + u8 pf_index; + u8 reserved[2]; + __le32 count; + __le32 addr_high; + __le32 addr_low; +}; + +/* Device/Function buffer entry, repeated per reported capability */ +struct ice_aqc_list_caps_elem { + __le16 cap; +#define ICE_AQC_CAPS_SWITCHING_MODE 0x0001 +#define ICE_AQC_CAPS_MANAGEABILITY_MODE 0x0002 +#define ICE_AQC_CAPS_OS2BMC 0x0004 +#define ICE_AQC_CAPS_VALID_FUNCTIONS 0x0005 +#define ICE_AQC_MAX_VALID_FUNCTIONS 0x8 +#define ICE_AQC_CAPS_ALTERNATE_RAM 0x0006 +#define ICE_AQC_CAPS_WOL_PROXY 0x0008 +#define ICE_AQC_CAPS_SRIOV 0x0012 +#define ICE_AQC_CAPS_VF 0x0013 +#define ICE_AQC_CAPS_802_1QBG 0x0015 +#define ICE_AQC_CAPS_802_1BR 0x0016 +#define ICE_AQC_CAPS_VSI 0x0017 +#define ICE_AQC_CAPS_DCB 0x0018 +#define ICE_AQC_CAPS_RSVD 0x0021 +#define ICE_AQC_CAPS_ISCSI 0x0022 +#define ICE_AQC_CAPS_RSS 0x0040 +#define ICE_AQC_CAPS_RXQS 0x0041 +#define ICE_AQC_CAPS_TXQS 0x0042 +#define ICE_AQC_CAPS_MSIX 0x0043 +#define ICE_AQC_CAPS_MAX_MTU 0x0047 +#define ICE_AQC_CAPS_NVM_VER 0x0048 +#define ICE_AQC_CAPS_CEM 0x00F2 +#define ICE_AQC_CAPS_IWARP 0x0051 +#define ICE_AQC_CAPS_LED 0x0061 +#define ICE_AQC_CAPS_SDP 0x0062 +#define ICE_AQC_CAPS_WR_CSR_PROT 0x0064 +#define ICE_AQC_CAPS_NO_DROP_POLICY 0x0065 +#define ICE_AQC_CAPS_LOGI_TO_PHYSI_PORT_MAP 0x0073 +#define ICE_AQC_CAPS_SKU 0x0074 +#define ICE_AQC_CAPS_PORT_MAP 0x0075 +#define ICE_AQC_CAPS_NVM_MGMT 0x0080 + + u8 major_ver; + u8 minor_ver; + /* Number of resources described by this capability */ + __le32 number; + /* Only meaningful for some types of resources */ + __le32 logical_id; + /* Only meaningful for some types of resources */ + __le32 phys_id; + __le64 rsvd1; + __le64 rsvd2; +}; + +/* Manage MAC address, read command - indirect (0x0107) + * This struct is also used for the response + */ +struct ice_aqc_manage_mac_read { + __le16 flags; /* Zeroed by device driver */ +#define ICE_AQC_MAN_MAC_LAN_ADDR_VALID BIT(4) +#define ICE_AQC_MAN_MAC_SAN_ADDR_VALID BIT(5) +#define ICE_AQC_MAN_MAC_PORT_ADDR_VALID BIT(6) +#define ICE_AQC_MAN_MAC_WOL_ADDR_VALID BIT(7) +#define ICE_AQC_MAN_MAC_MC_MAG_EN BIT(8) +#define ICE_AQC_MAN_MAC_WOL_PRESERVE_ON_PFR BIT(9) +#define ICE_AQC_MAN_MAC_READ_S 4 +#define ICE_AQC_MAN_MAC_READ_M (0xF << ICE_AQC_MAN_MAC_READ_S) + u8 rsvd[2]; + u8 num_addr; /* Used in response */ + u8 rsvd1[3]; + __le32 addr_high; + __le32 addr_low; +}; + +/* Response buffer format for manage MAC read command */ +struct ice_aqc_manage_mac_read_resp { + u8 lport_num; + u8 addr_type; +#define ICE_AQC_MAN_MAC_ADDR_TYPE_LAN 0 +#define ICE_AQC_MAN_MAC_ADDR_TYPE_WOL 1 + u8 mac_addr[ETH_ALEN]; +}; + +/* Manage MAC address, write command - direct (0x0108) */ +struct ice_aqc_manage_mac_write { + u8 rsvd; + u8 flags; +#define ICE_AQC_MAN_MAC_WR_MC_MAG_EN BIT(0) +#define ICE_AQC_MAN_MAC_WR_WOL_LAA_PFR_KEEP BIT(1) +#define ICE_AQC_MAN_MAC_WR_S 6 +#define ICE_AQC_MAN_MAC_WR_M MAKEMASK(3, ICE_AQC_MAN_MAC_WR_S) +#define ICE_AQC_MAN_MAC_UPDATE_LAA 0 +#define ICE_AQC_MAN_MAC_UPDATE_LAA_WOL BIT(ICE_AQC_MAN_MAC_WR_S) + /* byte stream in network order */ + u8 mac_addr[ETH_ALEN]; + __le32 addr_high; + __le32 addr_low; +}; + +/* Clear PXE Command and response (direct 0x0110) */ +struct ice_aqc_clear_pxe { + u8 rx_cnt; +#define ICE_AQC_CLEAR_PXE_RX_CNT 0x2 + u8 reserved[15]; +}; + +/* Configure No-Drop Policy Command (direct 0x0112) */ +struct ice_aqc_config_no_drop_policy { + u8 opts; +#define ICE_AQC_FORCE_NO_DROP BIT(0) + u8 rsvd[15]; +}; + +/* Get switch configuration (0x0200) */ +struct ice_aqc_get_sw_cfg { + /* Reserved for command and copy of request flags for response */ + __le16 flags; + /* First desc in case of command and next_elem in case of response + * In case of response, if it is not zero, means all the configuration + * was not returned and new command shall be sent with this value in + * the 'first desc' field + */ + __le16 element; + /* Reserved for command, only used for response */ + __le16 num_elems; + __le16 rsvd; + __le32 addr_high; + __le32 addr_low; +}; + +/* Each entry in the response buffer is of the following type: */ +struct ice_aqc_get_sw_cfg_resp_elem { + /* VSI/Port Number */ + __le16 vsi_port_num; +#define ICE_AQC_GET_SW_CONF_RESP_VSI_PORT_NUM_S 0 +#define ICE_AQC_GET_SW_CONF_RESP_VSI_PORT_NUM_M \ + (0x3FF << ICE_AQC_GET_SW_CONF_RESP_VSI_PORT_NUM_S) +#define ICE_AQC_GET_SW_CONF_RESP_TYPE_S 14 +#define ICE_AQC_GET_SW_CONF_RESP_TYPE_M (0x3 << ICE_AQC_GET_SW_CONF_RESP_TYPE_S) +#define ICE_AQC_GET_SW_CONF_RESP_PHYS_PORT 0 +#define ICE_AQC_GET_SW_CONF_RESP_VIRT_PORT 1 +#define ICE_AQC_GET_SW_CONF_RESP_VSI 2 + + /* SWID VSI/Port belongs to */ + __le16 swid; + + /* Bit 14..0 : PF/VF number VSI belongs to + * Bit 15 : VF indication bit + */ + __le16 pf_vf_num; +#define ICE_AQC_GET_SW_CONF_RESP_FUNC_NUM_S 0 +#define ICE_AQC_GET_SW_CONF_RESP_FUNC_NUM_M \ + (0x7FFF << ICE_AQC_GET_SW_CONF_RESP_FUNC_NUM_S) +#define ICE_AQC_GET_SW_CONF_RESP_IS_VF BIT(15) +}; + +/* The response buffer is as follows. Note that the length of the + * elements array varies with the length of the command response. + */ +struct ice_aqc_get_sw_cfg_resp { + struct ice_aqc_get_sw_cfg_resp_elem elements[1]; +}; + +/* Set Port parameters, (direct, 0x0203) */ +struct ice_aqc_set_port_params { + __le16 cmd_flags; +#define ICE_AQC_SET_P_PARAMS_SAVE_BAD_PACKETS BIT(0) +#define ICE_AQC_SET_P_PARAMS_PAD_SHORT_PACKETS BIT(1) +#define ICE_AQC_SET_P_PARAMS_DOUBLE_VLAN_ENA BIT(2) + __le16 bad_frame_vsi; +#define ICE_AQC_SET_P_PARAMS_VSI_S 0 +#define ICE_AQC_SET_P_PARAMS_VSI_M (0x3FF << ICE_AQC_SET_P_PARAMS_VSI_S) +#define ICE_AQC_SET_P_PARAMS_VSI_VALID BIT(15) + __le16 swid; +#define ICE_AQC_SET_P_PARAMS_SWID_S 0 +#define ICE_AQC_SET_P_PARAMS_SWID_M (0xFF << ICE_AQC_SET_P_PARAMS_SWID_S) +#define ICE_AQC_SET_P_PARAMS_LOGI_PORT_ID_S 8 +#define ICE_AQC_SET_P_PARAMS_LOGI_PORT_ID_M \ + (0x3F << ICE_AQC_SET_P_PARAMS_LOGI_PORT_ID_S) +#define ICE_AQC_SET_P_PARAMS_IS_LOGI_PORT BIT(14) +#define ICE_AQC_SET_P_PARAMS_SWID_VALID BIT(15) + u8 reserved[10]; +}; + +/* These resource type defines are used for all switch resource + * commands where a resource type is required, such as: + * Get Resource Allocation command (indirect 0x0204) + * Allocate Resources command (indirect 0x0208) + * Free Resources command (indirect 0x0209) + * Get Allocated Resource Descriptors Command (indirect 0x020A) + */ +#define ICE_AQC_RES_TYPE_VEB_COUNTER 0x00 +#define ICE_AQC_RES_TYPE_VLAN_COUNTER 0x01 +#define ICE_AQC_RES_TYPE_MIRROR_RULE 0x02 +#define ICE_AQC_RES_TYPE_VSI_LIST_REP 0x03 +#define ICE_AQC_RES_TYPE_VSI_LIST_PRUNE 0x04 +#define ICE_AQC_RES_TYPE_RECIPE 0x05 +#define ICE_AQC_RES_TYPE_PROFILE 0x06 +#define ICE_AQC_RES_TYPE_SWID 0x07 +#define ICE_AQC_RES_TYPE_VSI 0x08 +#define ICE_AQC_RES_TYPE_FLU 0x09 +#define ICE_AQC_RES_TYPE_WIDE_TABLE_1 0x0A +#define ICE_AQC_RES_TYPE_WIDE_TABLE_2 0x0B +#define ICE_AQC_RES_TYPE_WIDE_TABLE_4 0x0C +#define ICE_AQC_RES_TYPE_GLOBAL_RSS_HASH 0x20 +#define ICE_AQC_RES_TYPE_FDIR_COUNTER_BLOCK 0x21 +#define ICE_AQC_RES_TYPE_FDIR_GUARANTEED_ENTRIES 0x22 +#define ICE_AQC_RES_TYPE_FDIR_SHARED_ENTRIES 0x23 +#define ICE_AQC_RES_TYPE_FLEX_DESC_PROG 0x30 +#define ICE_AQC_RES_TYPE_SWITCH_PROF_BLDR_PROFID 0x48 +#define ICE_AQC_RES_TYPE_SWITCH_PROF_BLDR_TCAM 0x49 +#define ICE_AQC_RES_TYPE_ACL_PROF_BLDR_PROFID 0x50 +#define ICE_AQC_RES_TYPE_ACL_PROF_BLDR_TCAM 0x51 +#define ICE_AQC_RES_TYPE_FD_PROF_BLDR_PROFID 0x58 +#define ICE_AQC_RES_TYPE_FD_PROF_BLDR_TCAM 0x59 +#define ICE_AQC_RES_TYPE_HASH_PROF_BLDR_PROFID 0x60 +#define ICE_AQC_RES_TYPE_HASH_PROF_BLDR_TCAM 0x61 +/* Resource types 0x62-67 are reserved for Hash profile builder */ +#define ICE_AQC_RES_TYPE_QHASH_PROF_BLDR_PROFID 0x68 +#define ICE_AQC_RES_TYPE_QHASH_PROF_BLDR_TCAM 0x69 + +#define ICE_AQC_RES_TYPE_FLAG_SHARED BIT(7) +#define ICE_AQC_RES_TYPE_FLAG_SCAN_BOTTOM BIT(12) +#define ICE_AQC_RES_TYPE_FLAG_IGNORE_INDEX BIT(13) + +#define ICE_AQC_RES_TYPE_FLAG_DEDICATED 0x00 + +#define ICE_AQC_RES_TYPE_S 0 +#define ICE_AQC_RES_TYPE_M (0x07F << ICE_AQC_RES_TYPE_S) + +/* Get Resource Allocation command (indirect 0x0204) */ +struct ice_aqc_get_res_alloc { + __le16 resp_elem_num; /* Used in response, reserved in command */ + u8 reserved[6]; + __le32 addr_high; + __le32 addr_low; +}; + +/* Get Resource Allocation Response Buffer per response */ +struct ice_aqc_get_res_resp_elem { + __le16 res_type; /* Types defined above cmd 0x0204 */ + __le16 total_capacity; /* Resources available to all PF's */ + __le16 total_function; /* Resources allocated for a PF */ + __le16 total_shared; /* Resources allocated as shared */ + __le16 total_free; /* Resources un-allocated/not reserved by any PF */ +}; + +/* Buffer for Get Resource command */ +struct ice_aqc_get_res_resp { + /* Number of resource entries to be calculated using + * datalen/sizeof(struct ice_aqc_cmd_resp)). + * Value of 'datalen' gets updated as part of response. + */ + struct ice_aqc_get_res_resp_elem elem[1]; +}; + +/* Allocate Resources command (indirect 0x0208) + * Free Resources command (indirect 0x0209) + */ +struct ice_aqc_alloc_free_res_cmd { + __le16 num_entries; /* Number of Resource entries */ + u8 reserved[6]; + __le32 addr_high; + __le32 addr_low; +}; + +/* Resource descriptor */ +struct ice_aqc_res_elem { + union { + __le16 sw_resp; + __le16 flu_resp; + } e; +}; + +/* Buffer for Allocate/Free Resources commands */ +struct ice_aqc_alloc_free_res_elem { + __le16 res_type; /* Types defined above cmd 0x0204 */ +#define ICE_AQC_RES_TYPE_VSI_PRUNE_LIST_S 8 +#define ICE_AQC_RES_TYPE_VSI_PRUNE_LIST_M \ + (0xF << ICE_AQC_RES_TYPE_VSI_PRUNE_LIST_S) + __le16 num_elems; + struct ice_aqc_res_elem elem[1]; +}; + +/* Get Allocated Resource Descriptors Command (indirect 0x020A) */ +struct ice_aqc_get_allocd_res_desc { + union { + struct { + __le16 res; /* Types defined above cmd 0x0204 */ + __le16 first_desc; + __le32 reserved; + } cmd; + struct { + __le16 res; + __le16 next_desc; + __le16 num_desc; + __le16 reserved; + } resp; + } ops; + __le32 addr_high; + __le32 addr_low; +}; + +struct ice_aqc_get_allocd_res_desc_resp { + struct ice_aqc_res_elem elem[1]; +}; + +/* Add VSI (indirect 0x0210) + * Update VSI (indirect 0x0211) + * Get VSI (indirect 0x0212) + * Free VSI (indirect 0x0213) + */ +struct ice_aqc_add_get_update_free_vsi { + __le16 vsi_num; +#define ICE_AQ_VSI_NUM_S 0 +#define ICE_AQ_VSI_NUM_M (0x03FF << ICE_AQ_VSI_NUM_S) +#define ICE_AQ_VSI_IS_VALID BIT(15) + __le16 cmd_flags; +#define ICE_AQ_VSI_KEEP_ALLOC 0x1 + u8 vf_id; + u8 reserved; + __le16 vsi_flags; +#define ICE_AQ_VSI_TYPE_S 0 +#define ICE_AQ_VSI_TYPE_M (0x3 << ICE_AQ_VSI_TYPE_S) +#define ICE_AQ_VSI_TYPE_VF 0x0 +#define ICE_AQ_VSI_TYPE_VMDQ2 0x1 +#define ICE_AQ_VSI_TYPE_PF 0x2 +#define ICE_AQ_VSI_TYPE_EMP_MNG 0x3 + __le32 addr_high; + __le32 addr_low; +}; + +/* Response descriptor for: + * Add VSI (indirect 0x0210) + * Update VSI (indirect 0x0211) + * Free VSI (indirect 0x0213) + */ +struct ice_aqc_add_update_free_vsi_resp { + __le16 vsi_num; + __le16 ext_status; + __le16 vsi_used; + __le16 vsi_free; + __le32 addr_high; + __le32 addr_low; +}; + +struct ice_aqc_get_vsi_resp { + __le16 vsi_num; + u8 vf_id; + /* The vsi_flags field uses the ICE_AQ_VSI_TYPE_* defines for values. + * These are found above in struct ice_aqc_add_get_update_free_vsi. + */ + u8 vsi_flags; + __le16 vsi_used; + __le16 vsi_free; + __le32 addr_high; + __le32 addr_low; +}; + +struct ice_aqc_vsi_props { + __le16 valid_sections; +#define ICE_AQ_VSI_PROP_SW_VALID BIT(0) +#define ICE_AQ_VSI_PROP_SECURITY_VALID BIT(1) +#define ICE_AQ_VSI_PROP_VLAN_VALID BIT(2) +#define ICE_AQ_VSI_PROP_OUTER_TAG_VALID BIT(3) +#define ICE_AQ_VSI_PROP_INGRESS_UP_VALID BIT(4) +#define ICE_AQ_VSI_PROP_EGRESS_UP_VALID BIT(5) +#define ICE_AQ_VSI_PROP_RXQ_MAP_VALID BIT(6) +#define ICE_AQ_VSI_PROP_Q_OPT_VALID BIT(7) +#define ICE_AQ_VSI_PROP_OUTER_UP_VALID BIT(8) +#define ICE_AQ_VSI_PROP_FLOW_DIR_VALID BIT(11) +#define ICE_AQ_VSI_PROP_PASID_VALID BIT(12) + /* switch section */ + u8 sw_id; + u8 sw_flags; +#define ICE_AQ_VSI_SW_FLAG_ALLOW_LB BIT(5) +#define ICE_AQ_VSI_SW_FLAG_LOCAL_LB BIT(6) +#define ICE_AQ_VSI_SW_FLAG_SRC_PRUNE BIT(7) + u8 sw_flags2; +#define ICE_AQ_VSI_SW_FLAG_RX_PRUNE_EN_S 0 +#define ICE_AQ_VSI_SW_FLAG_RX_PRUNE_EN_M \ + (0xF << ICE_AQ_VSI_SW_FLAG_RX_PRUNE_EN_S) +#define ICE_AQ_VSI_SW_FLAG_RX_VLAN_PRUNE_ENA BIT(0) +#define ICE_AQ_VSI_SW_FLAG_LAN_ENA BIT(4) + u8 veb_stat_id; +#define ICE_AQ_VSI_SW_VEB_STAT_ID_S 0 +#define ICE_AQ_VSI_SW_VEB_STAT_ID_M (0x1F << ICE_AQ_VSI_SW_VEB_STAT_ID_S) +#define ICE_AQ_VSI_SW_VEB_STAT_ID_VALID BIT(5) + /* security section */ + u8 sec_flags; +#define ICE_AQ_VSI_SEC_FLAG_ALLOW_DEST_OVRD BIT(0) +#define ICE_AQ_VSI_SEC_FLAG_ENA_MAC_ANTI_SPOOF BIT(2) +#define ICE_AQ_VSI_SEC_TX_PRUNE_ENA_S 4 +#define ICE_AQ_VSI_SEC_TX_PRUNE_ENA_M (0xF << ICE_AQ_VSI_SEC_TX_PRUNE_ENA_S) +#define ICE_AQ_VSI_SEC_TX_VLAN_PRUNE_ENA BIT(0) + u8 sec_reserved; + /* VLAN section */ + __le16 pvid; /* VLANS include priority bits */ + u8 pvlan_reserved[2]; + u8 vlan_flags; +#define ICE_AQ_VSI_VLAN_MODE_S 0 +#define ICE_AQ_VSI_VLAN_MODE_M (0x3 << ICE_AQ_VSI_VLAN_MODE_S) +#define ICE_AQ_VSI_VLAN_MODE_UNTAGGED 0x1 +#define ICE_AQ_VSI_VLAN_MODE_TAGGED 0x2 +#define ICE_AQ_VSI_VLAN_MODE_ALL 0x3 +#define ICE_AQ_VSI_PVLAN_INSERT_PVID BIT(2) +#define ICE_AQ_VSI_VLAN_EMOD_S 3 +#define ICE_AQ_VSI_VLAN_EMOD_M (0x3 << ICE_AQ_VSI_VLAN_EMOD_S) +#define ICE_AQ_VSI_VLAN_EMOD_STR_BOTH (0x0 << ICE_AQ_VSI_VLAN_EMOD_S) +#define ICE_AQ_VSI_VLAN_EMOD_STR_UP (0x1 << ICE_AQ_VSI_VLAN_EMOD_S) +#define ICE_AQ_VSI_VLAN_EMOD_STR (0x2 << ICE_AQ_VSI_VLAN_EMOD_S) +#define ICE_AQ_VSI_VLAN_EMOD_NOTHING (0x3 << ICE_AQ_VSI_VLAN_EMOD_S) + u8 pvlan_reserved2[3]; + /* ingress egress up sections */ + __le32 ingress_table; /* bitmap, 3 bits per up */ +#define ICE_AQ_VSI_UP_TABLE_UP0_S 0 +#define ICE_AQ_VSI_UP_TABLE_UP0_M (0x7 << ICE_AQ_VSI_UP_TABLE_UP0_S) +#define ICE_AQ_VSI_UP_TABLE_UP1_S 3 +#define ICE_AQ_VSI_UP_TABLE_UP1_M (0x7 << ICE_AQ_VSI_UP_TABLE_UP1_S) +#define ICE_AQ_VSI_UP_TABLE_UP2_S 6 +#define ICE_AQ_VSI_UP_TABLE_UP2_M (0x7 << ICE_AQ_VSI_UP_TABLE_UP2_S) +#define ICE_AQ_VSI_UP_TABLE_UP3_S 9 +#define ICE_AQ_VSI_UP_TABLE_UP3_M (0x7 << ICE_AQ_VSI_UP_TABLE_UP3_S) +#define ICE_AQ_VSI_UP_TABLE_UP4_S 12 +#define ICE_AQ_VSI_UP_TABLE_UP4_M (0x7 << ICE_AQ_VSI_UP_TABLE_UP4_S) +#define ICE_AQ_VSI_UP_TABLE_UP5_S 15 +#define ICE_AQ_VSI_UP_TABLE_UP5_M (0x7 << ICE_AQ_VSI_UP_TABLE_UP5_S) +#define ICE_AQ_VSI_UP_TABLE_UP6_S 18 +#define ICE_AQ_VSI_UP_TABLE_UP6_M (0x7 << ICE_AQ_VSI_UP_TABLE_UP6_S) +#define ICE_AQ_VSI_UP_TABLE_UP7_S 21 +#define ICE_AQ_VSI_UP_TABLE_UP7_M (0x7 << ICE_AQ_VSI_UP_TABLE_UP7_S) + __le32 egress_table; /* same defines as for ingress table */ + /* outer tags section */ + __le16 outer_tag; + u8 outer_tag_flags; +#define ICE_AQ_VSI_OUTER_TAG_MODE_S 0 +#define ICE_AQ_VSI_OUTER_TAG_MODE_M (0x3 << ICE_AQ_VSI_OUTER_TAG_MODE_S) +#define ICE_AQ_VSI_OUTER_TAG_NOTHING 0x0 +#define ICE_AQ_VSI_OUTER_TAG_REMOVE 0x1 +#define ICE_AQ_VSI_OUTER_TAG_COPY 0x2 +#define ICE_AQ_VSI_OUTER_TAG_TYPE_S 2 +#define ICE_AQ_VSI_OUTER_TAG_TYPE_M (0x3 << ICE_AQ_VSI_OUTER_TAG_TYPE_S) +#define ICE_AQ_VSI_OUTER_TAG_NONE 0x0 +#define ICE_AQ_VSI_OUTER_TAG_STAG 0x1 +#define ICE_AQ_VSI_OUTER_TAG_VLAN_8100 0x2 +#define ICE_AQ_VSI_OUTER_TAG_VLAN_9100 0x3 +#define ICE_AQ_VSI_OUTER_TAG_INSERT BIT(4) +#define ICE_AQ_VSI_OUTER_TAG_ACCEPT_HOST BIT(6) + u8 outer_tag_reserved; + /* queue mapping section */ + __le16 mapping_flags; +#define ICE_AQ_VSI_Q_MAP_CONTIG 0x0 +#define ICE_AQ_VSI_Q_MAP_NONCONTIG BIT(0) + __le16 q_mapping[16]; +#define ICE_AQ_VSI_Q_S 0 +#define ICE_AQ_VSI_Q_M (0x7FF << ICE_AQ_VSI_Q_S) + __le16 tc_mapping[8]; +#define ICE_AQ_VSI_TC_Q_OFFSET_S 0 +#define ICE_AQ_VSI_TC_Q_OFFSET_M (0x7FF << ICE_AQ_VSI_TC_Q_OFFSET_S) +#define ICE_AQ_VSI_TC_Q_NUM_S 11 *** DIFF OUTPUT TRUNCATED AT 1000 LINES *** _______________________________________________ svn-src-all@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-all To unsubscribe, send any mail to "svn-src-all-unsubscr...@freebsd.org"
