Author: bdragon
Date: Wed Sep 23 01:56:26 2020
New Revision: 366053
URL: https://svnweb.freebsd.org/changeset/base/366053
Log:
[PowerPC64LE] Fix AP spinup on powernv.
OPAL unconditionally enters secondary CPUs with only HV and SF set.
I tried writing a secondary entry point instead, but OPAL rejected it
and I am unsure why, so I resorted to making the system reset interrupt
endian-flexible.
This means we take a slight performance hit on wakeup on LE, but it is
a good stopgap until we can figure out a reliable way to make OPAL enter
where we want it to.
It probably makes sense to have it around anyway, because I can imagine
scenarios where the cpu resets itself to BE and does a software reset.
Sponsored by: Tag1 Consulting, Inc.
Modified:
head/sys/powerpc/aim/trap_subr64.S
head/sys/powerpc/include/asm.h
Modified: head/sys/powerpc/aim/trap_subr64.S
==============================================================================
--- head/sys/powerpc/aim/trap_subr64.S Wed Sep 23 01:56:21 2020
(r366052)
+++ head/sys/powerpc/aim/trap_subr64.S Wed Sep 23 01:56:26 2020
(r366053)
@@ -319,6 +319,19 @@ dtrace_invop_calltrap_addr:
.globl CNAME(cpu_wakeup_handler)
.p2align 3
CNAME(rstcode):
+#ifdef __LITTLE_ENDIAN__
+ /*
+ * XXX This shouldn't be necessary.
+ *
+ * According to the ISA documentation, LE should be set from HILE
+ * or the LPCR ILE bit automatically. However, the entry into this
+ * vector from OPAL_START_CPU does not honor this correctly.
+ *
+ * We should be able to define an alternate entry for opal's
+ * start_kernel_secondary asm code to branch to.
+ */
+ RETURN_TO_NATIVE_ENDIAN
+#endif
/*
* Check if this is software reset or
* processor is waking up from power saving mode
Modified: head/sys/powerpc/include/asm.h
==============================================================================
--- head/sys/powerpc/include/asm.h Wed Sep 23 01:56:21 2020
(r366052)
+++ head/sys/powerpc/include/asm.h Wed Sep 23 01:56:26 2020
(r366053)
@@ -213,6 +213,9 @@ name: \
* wrong endian.
*
* This sequence is NMI-reentrant.
+ *
+ * Do not change the length of this sequence without looking at the users,
+ * this is used in size-constrained places like the reset vector!
*/
#define RETURN_TO_NATIVE_ENDIAN
\
tdi 0, %r0, 0x48; /* Endian swapped: b . + 8 */\
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