Author: dim
Date: Sat Dec 12 23:59:05 2020
New Revision: 368599
URL: https://svnweb.freebsd.org/changeset/base/368599
Log:
MFC r368489:
Merge commit 28de0fb48 from llvm git (by Luís Marques):
[RISCV] Set __GCC_HAVE_SYNC_COMPARE_AND_SWAP_x defines
The RISCV target did not set the GCC atomic compare and swap defines,
unlike other targets. This broke builds for things like glib on
RISCV.
Patch by Kristof Provost (kprovost)
Differential Revision: https://reviews.llvm.org/D91784
This should fix building glib20 on RISC-V and unblock a number of
dependent ports.
Requested by: kp
Modified:
stable/12/contrib/llvm-project/clang/lib/Basic/Targets/RISCV.cpp
Directory Properties:
stable/12/ (props changed)
Changes in other areas also in this revision:
Modified:
stable/11/contrib/llvm-project/clang/lib/Basic/Targets/RISCV.cpp
Directory Properties:
stable/11/ (props changed)
Modified: stable/12/contrib/llvm-project/clang/lib/Basic/Targets/RISCV.cpp
==============================================================================
--- stable/12/contrib/llvm-project/clang/lib/Basic/Targets/RISCV.cpp Sat Dec
12 23:41:47 2020 (r368598)
+++ stable/12/contrib/llvm-project/clang/lib/Basic/Targets/RISCV.cpp Sat Dec
12 23:59:05 2020 (r368599)
@@ -114,8 +114,14 @@ void RISCVTargetInfo::getTargetDefines(const LangOptio
Builder.defineMacro("__riscv_muldiv");
}
- if (HasA)
+ if (HasA) {
Builder.defineMacro("__riscv_atomic");
+ Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_1");
+ Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_2");
+ Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4");
+ if (Is64Bit)
+ Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_8");
+ }
if (HasF || HasD) {
Builder.defineMacro("__riscv_flen", HasD ? "64" : "32");
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