Author: adrian
Date: Tue Mar 22 00:43:58 2011
New Revision: 219854
URL: http://svn.freebsd.org/changeset/base/219854
Log:
Do a bit of spring cleaning in the board setup code, just to
bring it in line with the rest of the register initialisation.
I've verified that the 2/5ghz board values written to the
chip match what was previously written.
Modified:
head/sys/dev/ath/ath_hal/ar5416/ar5416_reset.c
Modified: head/sys/dev/ath/ath_hal/ar5416/ar5416_reset.c
==============================================================================
--- head/sys/dev/ath/ath_hal/ar5416/ar5416_reset.c Tue Mar 22 00:14:17
2011 (r219853)
+++ head/sys/dev/ath/ath_hal/ar5416/ar5416_reset.c Tue Mar 22 00:43:58
2011 (r219854)
@@ -1317,16 +1317,12 @@ ar5416SetDefGainValues(struct ath_hal *a
AR_PHY_GAIN_2GHZ_XATTEN2_DB,
pModal->xatten2Db[i]);
} else {
- OS_REG_WRITE(ah, AR_PHY_GAIN_2GHZ + regChainOffset,
- (OS_REG_READ(ah, AR_PHY_GAIN_2GHZ + regChainOffset) &
- ~AR_PHY_GAIN_2GHZ_BSW_MARGIN)
- | SM(pModal-> bswMargin[i],
- AR_PHY_GAIN_2GHZ_BSW_MARGIN));
- OS_REG_WRITE(ah, AR_PHY_GAIN_2GHZ + regChainOffset,
- (OS_REG_READ(ah, AR_PHY_GAIN_2GHZ + regChainOffset) &
- ~AR_PHY_GAIN_2GHZ_BSW_ATTEN)
- | SM(pModal->bswAtten[i],
- AR_PHY_GAIN_2GHZ_BSW_ATTEN));
+ OS_REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + regChainOffset,
+ AR_PHY_GAIN_2GHZ_BSW_MARGIN,
+ pModal->bswMargin[i]);
+ OS_REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + regChainOffset,
+ AR_PHY_GAIN_2GHZ_BSW_ATTEN,
+ pModal->bswAtten[i]);
}
}
@@ -1338,16 +1334,12 @@ ar5416SetDefGainValues(struct ath_hal *a
AR_PHY_RXGAIN + regChainOffset,
AR9280_PHY_RXGAIN_TXRX_MARGIN, pModal->rxTxMarginCh[i]);
} else {
- OS_REG_WRITE(ah,
+ OS_REG_RMW_FIELD(ah,
AR_PHY_RXGAIN + regChainOffset,
- (OS_REG_READ(ah, AR_PHY_RXGAIN + regChainOffset) &
- ~AR_PHY_RXGAIN_TXRX_ATTEN)
- | SM(txRxAttenLocal, AR_PHY_RXGAIN_TXRX_ATTEN));
- OS_REG_WRITE(ah,
+ AR_PHY_RXGAIN_TXRX_ATTEN, txRxAttenLocal);
+ OS_REG_RMW_FIELD(ah,
AR_PHY_GAIN_2GHZ + regChainOffset,
- (OS_REG_READ(ah, AR_PHY_GAIN_2GHZ + regChainOffset) &
- ~AR_PHY_GAIN_2GHZ_RXTX_MARGIN) |
- SM(pModal->rxTxMarginCh[i],
AR_PHY_GAIN_2GHZ_RXTX_MARGIN));
+ AR_PHY_GAIN_2GHZ_RXTX_MARGIN,
pModal->rxTxMarginCh[i]);
}
}
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