Author: jkim
Date: Sat Dec 1 00:56:19 2012
New Revision: 243737
URL: http://svnweb.freebsd.org/changeset/base/243737
Log:
Remove duplicate code. Reduce diff between amd64 and i386.
Modified:
head/sys/amd64/pci/pci_cfgreg.c
head/sys/i386/pci/pci_cfgreg.c
Modified: head/sys/amd64/pci/pci_cfgreg.c
==============================================================================
--- head/sys/amd64/pci/pci_cfgreg.c Sat Dec 1 00:11:24 2012
(r243736)
+++ head/sys/amd64/pci/pci_cfgreg.c Sat Dec 1 00:56:19 2012
(r243737)
@@ -295,6 +295,13 @@ pcie_cfgregopen(uint64_t base, uint8_t m
return (1);
}
+#define PCIE_VADDR(base, reg, bus, slot, func) \
+ ((base) + \
+ ((((bus) & 0xff) << 20) | \
+ (((slot) & 0x1f) << 15) | \
+ (((func) & 0x7) << 12) | \
+ ((reg) & 0xfff)))
+
/*
* AMD BIOS And Kernel Developer's Guides for CPU families starting with 10h
* have a requirement that all accesses to the memory mapped PCI configuration
@@ -302,12 +309,6 @@ pcie_cfgregopen(uint64_t base, uint8_t m
* Since other vendors do not currently have any contradicting requirements
* the AMD access pattern is applied universally.
*/
-#define PCIE_VADDR(base, reg, bus, slot, func) \
- ((base) + \
- ((((bus) & 0xff) << 20) | \
- (((slot) & 0x1f) << 15) | \
- (((func) & 0x7) << 12) | \
- ((reg) & 0xfff)))
static int
pciereg_cfgread(int bus, unsigned slot, unsigned func, unsigned reg,
Modified: head/sys/i386/pci/pci_cfgreg.c
==============================================================================
--- head/sys/i386/pci/pci_cfgreg.c Sat Dec 1 00:11:24 2012
(r243736)
+++ head/sys/i386/pci/pci_cfgreg.c Sat Dec 1 00:56:19 2012
(r243737)
@@ -610,25 +610,29 @@ pcie_cfgregopen(uint64_t base, uint8_t m
}
#endif /* !XEN */
-#define PCIE_PADDR(bar, reg, bus, slot, func) \
- ((bar) | \
- (((bus) & 0xff) << 20) | \
+#define PCIE_PADDR(base, reg, bus, slot, func) \
+ ((base) + \
+ ((((bus) & 0xff) << 20) | \
(((slot) & 0x1f) << 15) | \
(((func) & 0x7) << 12) | \
- ((reg) & 0xfff))
+ ((reg) & 0xfff)))
-/*
- * Find an element in the cache that matches the physical page desired, or
- * create a new mapping from the least recently used element.
- * A very simple LRU algorithm is used here, does it need to be more
- * efficient?
- */
-static __inline struct pcie_cfg_elem *
-pciereg_findelem(vm_paddr_t papage)
+static __inline vm_offset_t
+pciereg_findaddr(int bus, unsigned slot, unsigned func, unsigned reg)
{
struct pcie_cfg_list *pcielist;
struct pcie_cfg_elem *elem;
+ vm_paddr_t pa, papage;
+ pa = PCIE_PADDR(pcie_base, reg, bus, slot, func);
+ papage = pa & ~PAGE_MASK;
+
+ /*
+ * Find an element in the cache that matches the physical page desired,
+ * or create a new mapping from the least recently used element.
+ * A very simple LRU algorithm is used here, does it need to be more
+ * efficient?
+ */
pcielist = &pcie_list[PCPU_GET(cpuid)];
TAILQ_FOREACH(elem, pcielist, elem) {
if (elem->papage == papage)
@@ -649,7 +653,7 @@ pciereg_findelem(vm_paddr_t papage)
TAILQ_REMOVE(pcielist, elem, elem);
TAILQ_INSERT_HEAD(pcielist, elem, elem);
}
- return (elem);
+ return (elem->vapage | (pa & PAGE_MASK));
}
/*
@@ -664,9 +668,7 @@ static int
pciereg_cfgread(int bus, unsigned slot, unsigned func, unsigned reg,
unsigned bytes)
{
- struct pcie_cfg_elem *elem;
vm_offset_t va;
- vm_paddr_t pa, papage;
int data = -1;
if (bus < pcie_minbus || bus > pcie_maxbus || slot > PCI_SLOTMAX ||
@@ -674,10 +676,7 @@ pciereg_cfgread(int bus, unsigned slot,
return (-1);
critical_enter();
- pa = PCIE_PADDR(pcie_base, reg, bus, slot, func);
- papage = pa & ~PAGE_MASK;
- elem = pciereg_findelem(papage);
- va = elem->vapage | (pa & PAGE_MASK);
+ va = pciereg_findaddr(bus, slot, func, reg);
switch (bytes) {
case 4:
@@ -702,19 +701,14 @@ static void
pciereg_cfgwrite(int bus, unsigned slot, unsigned func, unsigned reg, int data,
unsigned bytes)
{
- struct pcie_cfg_elem *elem;
vm_offset_t va;
- vm_paddr_t pa, papage;
if (bus < pcie_minbus || bus > pcie_maxbus || slot > PCI_SLOTMAX ||
func > PCI_FUNCMAX || reg > PCIE_REGMAX)
return;
critical_enter();
- pa = PCIE_PADDR(pcie_base, reg, bus, slot, func);
- papage = pa & ~PAGE_MASK;
- elem = pciereg_findelem(papage);
- va = elem->vapage | (pa & PAGE_MASK);
+ va = pciereg_findaddr(bus, slot, func, reg);
switch (bytes) {
case 4:
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