Author: gber
Date: Tue Jun  4 09:33:03 2013
New Revision: 251371
URL: http://svnweb.freebsd.org/changeset/base/251371

Log:
  Fix the passing of time on Armada XP.
  
  In order to become independent of Coherency Fabric frequency, configure
  Timer and Watchdog to operate in 25MHz mode.
  
  Submitted by: Zbigniew Bodek <z...@semihalf.com>

Modified:
  head/sys/arm/mv/mvreg.h
  head/sys/arm/mv/timer.c

Modified: head/sys/arm/mv/mvreg.h
==============================================================================
--- head/sys/arm/mv/mvreg.h     Tue Jun  4 09:21:18 2013        (r251370)
+++ head/sys/arm/mv/mvreg.h     Tue Jun  4 09:33:03 2013        (r251371)
@@ -215,6 +215,10 @@
 #define CPU_TIMER1_AUTO                0x00000008
 #define CPU_TIMER_WD_EN                0x00000010
 #define CPU_TIMER_WD_AUTO      0x00000020
+/* 25MHz mode is Armada XP - specific */
+#define CPU_TIMER_WD_25MHZ_EN  0x00000400
+#define CPU_TIMER0_25MHZ_EN    0x00000800
+#define CPU_TIMER1_25MHZ_EN    0x00001000
 #define CPU_TIMER0_REL         0x10
 #define CPU_TIMER0             0x14
 

Modified: head/sys/arm/mv/timer.c
==============================================================================
--- head/sys/arm/mv/timer.c     Tue Jun  4 09:21:18 2013        (r251370)
+++ head/sys/arm/mv/timer.c     Tue Jun  4 09:33:03 2013        (r251371)
@@ -56,7 +56,7 @@ __FBSDID("$FreeBSD$");
 #define MAX_WATCHDOG_TICKS     (0xffffffff)
 
 #if defined(SOC_MV_ARMADAXP)
-#define MV_CLOCK_SRC           get_l2clk()
+#define MV_CLOCK_SRC           25000000        /* Timers' 25MHz mode */
 #else
 #define MV_CLOCK_SRC           get_tclk()
 #endif
@@ -323,6 +323,9 @@ mv_watchdog_enable(void)
 
        val = mv_get_timer_control();
        val |= CPU_TIMER_WD_EN | CPU_TIMER_WD_AUTO;
+#if defined(SOC_MV_ARMADAXP)
+       val |= CPU_TIMER_WD_25MHZ_EN;
+#endif
        mv_set_timer_control(val);
 }
 
@@ -440,6 +443,10 @@ mv_setup_timers(void)
        val = mv_get_timer_control();
        val &= ~(CPU_TIMER0_EN | CPU_TIMER0_AUTO);
        val |= CPU_TIMER1_EN | CPU_TIMER1_AUTO;
+#if defined(SOC_MV_ARMADAXP)
+       /* Enable 25MHz mode */
+       val |= CPU_TIMER0_25MHZ_EN | CPU_TIMER1_25MHZ_EN;
+#endif
        mv_set_timer_control(val);
        timers_initialized = 1;
 }
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