Author: mm Date: Sat Apr 30 23:00:41 2011 New Revision: 221282 URL: http://svn.freebsd.org/changeset/base/221282
Log: Add ChangeLog.gcc43 for backported changes from gcc 4.3 MFC after: 3 days Added: head/contrib/gcc/ChangeLog.gcc43 Added: head/contrib/gcc/ChangeLog.gcc43 ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ head/contrib/gcc/ChangeLog.gcc43 Sat Apr 30 23:00:41 2011 (r221282) @@ -0,0 +1,163 @@ +2007-05-01 Dwarakanath Rajagopal <dwarak.rajago...@amd.com> (r124339) + + * config/i386/i386.c (override_options): Accept k8-sse3, opteron-sse3 + and athlon64-sse3 as improved versions of k8, opteron and athlon64 + with SSE3 instruction set support. + * doc/invoke.texi: Likewise. + +2007-04-07 H.J. Lu <hongjiu...@intel.com> (r123639) + + * config/i386/i386.c (ix86_handle_option): Handle SSSE3. + +2007-02-08 Harsha Jagasia <harsha.jaga...@amd.com> (r121726) + + * config/i386/xmmintrin.h: Make inclusion of emmintrin.h + conditional to __SSE2__. + (Entries below should have been added to first ChangeLog + entry for amdfam10 dated 2007-02-05) + * config/i386/emmintrin.h: Generate #error if __SSE2__ is not + defined. + * config/i386/pmmintrin.h: Generate #error if __SSE3__ is not + defined. + * config/i386/tmmintrin.h: Generate #error if __SSSE3__ is not + defined. + +2007-02-07 Jakub Jelinek <ja...@redhat.com> (r121687) + + * config/i386/i386.c (override_options): Set PTA_SSSE3 for core2. + +2007-01-17 Eric Christopher <echri...@apple.com> (r120846) + + * config.gcc: Support core2 processor. + +2006-12-02 H.J. Lu <hongjiu...@intel.com> (r119454 - partial) + + PR target/30040 + * config/i386/driver-i386.c (bit_SSSE3): New. + +2006-11-18 Vladimir Makarov <vmaka...@redhat.com> (r118973) + + * doc/invoke.texi (core2): Add item. + + * config/i386/i386.h (TARGET_CORE2, TARGET_CPU_DEFAULT_core2): New + macros. + (TARGET_CPU_CPP_BUILTINS): Add code for core2. + (TARGET_CPU_DEFAULT_generic): Change value. + (TARGET_CPU_DEFAULT_NAMES): Add core2. + (processor_type): Add new constant PROCESSOR_CORE2. + + * config/i386/i386.md (cpu): Add core2. + + * config/i386/i386.c (core2_cost): New initialized variable. + (m_CORE2): New macro. + (x86_use_leave, x86_push_memory, x86_movx, x86_unroll_strlen, + x86_deep_branch, x86_partial_reg_stall, x86_use_simode_fiop, + x86_use_cltd, x86_promote_QImode, x86_sub_esp_4, x86_sub_esp_8, + x86_add_esp_4, x86_add_esp_8, x86_integer_DFmode_moves, + x86_partial_reg_dependency, x86_memory_mismatch_stall, + x86_accumulate_outgoing_args, x86_prologue_using_move, + x86_epilogue_using_move, x86_arch_always_fancy_math_387, + x86_sse_partial_reg_dependency, x86_rep_movl_optimal, + x86_use_incdec, x86_four_jump_limit, x86_schedule, + x86_pad_returns): Add m_CORE2. + (override_options): Add entries for Core2. + (ix86_issue_rate): Add case for Core2. + +2006-10-27 Vladimir Makarov <vmaka...@redhat.com> (r118090) + + * config/i386/i386.h (TARGET_GEODE): + (TARGET_CPU_CPP_BUILTINS): Add code for geode. + (TARGET_CPU_DEFAULT_geode): New macro. + (TARGET_CPU_DEFAULT_k6, TARGET_CPU_DEFAULT_k6_2, + TARGET_CPU_DEFAULT_k6_3, TARGET_CPU_DEFAULT_athlon, + TARGET_CPU_DEFAULT_athlon_sse, TARGET_CPU_DEFAULT_k8, + TARGET_CPU_DEFAULT_pentium_m, TARGET_CPU_DEFAULT_prescott, + TARGET_CPU_DEFAULT_nocona, TARGET_CPU_DEFAULT_generic): Increase + the macro values. + (TARGET_CPU_DEFAULT_NAMES): Add geode. + (processor_type): Add PROCESSOR_GEODE. + + * config/i386/i386.md: Include geode.md. + (cpu): Add geode. + + * config/i386/i386.c (geode_cost): New initialized global + variable. + (m_GEODE, m_K6_GEODE): New macros. + (x86_use_leave, x86_push_memory, x86_deep_branch, x86_use_sahf, + x86_use_himode_fiop, x86_promote_QImode, x86_add_esp_4, + x86_add_esp_8, x86_rep_movl_optimal, x86_ext_80387_constants, + x86_schedule): Use m_K6_GEODE instead of m_K6. + (x86_movx, x86_cmove): Set up m_GEODE. + (x86_integer_DFmode_moves): Clear m_GEODE. + (processor_target_table): Add entry for geode. + (processor_alias_table): Ditto. + + * config/i386/geode.md: New file. + + * doc/invoke.texi: Add entry about geode processor. + +2006-10-22 H.J. Lu <hongjiu...@intel.com> (r117958) + + * config.gcc (i[34567]86-*-*): Add tmmintrin.h to extra_headers. + (x86_64-*-*): Likewise. + + * config/i386/i386.c (pta_flags): Add PTA_SSSE3. + (override_options): Check SSSE3. + (ix86_builtins): Add IX86_BUILTIN_PHADDW, IX86_BUILTIN_PHADDD, + IX86_BUILTIN_PHADDSW, IX86_BUILTIN_PHSUBW, IX86_BUILTIN_PHSUBD, + IX86_BUILTIN_PHSUBSW, IX86_BUILTIN_PMADDUBSW, + IX86_BUILTIN_PMULHRSW, IX86_BUILTIN_PSHUFB, + IX86_BUILTIN_PSIGNB, IX86_BUILTIN_PSIGNW, IX86_BUILTIN_PSIGND, + IX86_BUILTIN_PALIGNR, IX86_BUILTIN_PABSB, IX86_BUILTIN_PABSW, + IX86_BUILTIN_PABSD, IX86_BUILTIN_PHADDW128, + IX86_BUILTIN_PHADDD128, IX86_BUILTIN_PHADDSW128, + IX86_BUILTIN_PHSUBW128, IX86_BUILTIN_PHSUBD128, + IX86_BUILTIN_PHSUBSW128, IX86_BUILTIN_PMADDUBSW128, + IX86_BUILTIN_PMULHRSW128, IX86_BUILTIN_PSHUFB128, + IX86_BUILTIN_PSIGNB128, IX86_BUILTIN_PSIGNW128, + IX86_BUILTIN_PSIGND128, IX86_BUILTIN_PALIGNR128, + IX86_BUILTIN_PABSB128, IX86_BUILTIN_PABSW128 and + IX86_BUILTIN_PABSD128. + (bdesc_2arg): Add SSSE3. + (bdesc_1arg): Likewise. + (ix86_init_mmx_sse_builtins): Support SSSE3. + (ix86_expand_builtin): Likewise. + * config/i386/i386.h (TARGET_CPU_CPP_BUILTINS): Likewise. + + * config/i386/i386.md (UNSPEC_PSHUFB): New. + (UNSPEC_PSIGN): Likewise. + (UNSPEC_PALIGNR): Likewise. + Include mmx.md before sse.md. + + * config/i386/i386.opt: Add -mssse3. + + * config/i386/sse.md (ssse3_phaddwv8hi3): New pattern for SSSE3. + (ssse3_phaddwv4hi3): Likewise. + (ssse3_phadddv4si3): Likewise. + (ssse3_phadddv2si3): Likewise. + (ssse3_phaddswv8hi3): Likewise. + (ssse3_phaddswv4hi3): Likewise. + (ssse3_phsubwv8hi3): Likewise. + (ssse3_phsubwv4hi3): Likewise. + (ssse3_phsubdv4si3): Likewise. + (ssse3_phsubdv2si3): Likewise. + (ssse3_phsubswv8hi3): Likewise. + (ssse3_phsubswv4hi3): Likewise. + (ssse3_pmaddubswv8hi3): Likewise. + (ssse3_pmaddubswv4hi3): Likewise. + (ssse3_pmulhrswv8hi3): Likewise. + (ssse3_pmulhrswv4hi3): Likewise. + (ssse3_pshufbv16qi3): Likewise. + (ssse3_pshufbv8qi3): Likewise. + (ssse3_psign<mode>3): Likewise. + (ssse3_psign<mode>3): Likewise. + (ssse3_palignrti): Likewise. + (ssse3_palignrdi): Likewise. + (abs<mode>2): Likewise. + (abs<mode>2): Likewise. + + * config/i386/tmmintrin.h: New file. + + * doc/extend.texi: Document SSSE3 built-in functions. + + * doc/invoke.texi: Document -mssse3/-mno-ssse3 switches. _______________________________________________ svn-src-head@freebsd.org mailing list http://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
