Author: adrian
Date: Fri May 25 02:07:59 2012
New Revision: 235957
URL: http://svn.freebsd.org/changeset/base/235957
Log:
Prepare for improved (read: pcie) suspend/resume support.
* Flesh out the pcie disable method for 11n chips, as they were defaulting
to the AR5212 (empty) PCIe disable method.
* Add accessor macros for the HAL PCIe enable/disable calls.
* Call disable on ath_suspend()
* Call enable on ath_resume()
NOTE:
* This has nothing to do with the NIC sleep/run state - the NIC still
will stay in network-run state rather than supporting network-sleep
state. This is preparation work for supporting correct suspend/resume
WARs for the 11n PCIe NICs.
TODO:
* It may be feasible at this point to keep the chip powered down during
initial probe/attach and only power it up upon the first configure/reset
pass. This however would require correct (for values of "correct")
tracking of the NIC power configuration state from the driver and that
just isn't attempted at the moment.
Tested:
* AR9280 on my Lenovo T60, but with no suspend/resume pass (yet).
Modified:
head/sys/dev/ath/ath_hal/ar5416/ar5416_attach.c
head/sys/dev/ath/ath_hal/ar9002/ar9280_attach.c
head/sys/dev/ath/ath_hal/ar9002/ar9285_attach.c
head/sys/dev/ath/ath_hal/ar9002/ar9287_attach.c
head/sys/dev/ath/if_ath.c
head/sys/dev/ath/if_athvar.h
Modified: head/sys/dev/ath/ath_hal/ar5416/ar5416_attach.c
==============================================================================
--- head/sys/dev/ath/ath_hal/ar5416/ar5416_attach.c Fri May 25 01:48:15
2012 (r235956)
+++ head/sys/dev/ath/ath_hal/ar5416/ar5416_attach.c Fri May 25 02:07:59
2012 (r235957)
@@ -31,6 +31,7 @@
#include "ar5416/ar5416.ini"
static void ar5416ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore);
+static void ar5416DisablePCIE(struct ath_hal *ah);
static void ar5416WriteIni(struct ath_hal *ah,
const struct ieee80211_channel *chan);
static void ar5416SpurMitigate(struct ath_hal *ah,
@@ -99,6 +100,7 @@ ar5416InitState(struct ath_hal_5416 *ahp
ah->ah_phyDisable = ar5416PhyDisable;
ah->ah_disable = ar5416Disable;
ah->ah_configPCIE = ar5416ConfigPCIE;
+ ah->ah_disablePCIE = ar5416DisablePCIE;
ah->ah_perCalibration = ar5416PerCalibration;
ah->ah_perCalibrationN = ar5416PerCalibrationN,
ah->ah_resetCalValid = ar5416ResetCalValid,
@@ -474,6 +476,12 @@ ar5416ConfigPCIE(struct ath_hal *ah, HAL
}
static void
+ar5416DisablePCIE(struct ath_hal *ah)
+{
+ /* XXX TODO */
+}
+
+static void
ar5416WriteIni(struct ath_hal *ah, const struct ieee80211_channel *chan)
{
u_int modesIndex, freqIndex;
Modified: head/sys/dev/ath/ath_hal/ar9002/ar9280_attach.c
==============================================================================
--- head/sys/dev/ath/ath_hal/ar9002/ar9280_attach.c Fri May 25 01:48:15
2012 (r235956)
+++ head/sys/dev/ath/ath_hal/ar9002/ar9280_attach.c Fri May 25 02:07:59
2012 (r235957)
@@ -62,6 +62,7 @@ static const HAL_PERCAL_DATA ar9280_adc_
};
static void ar9280ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore);
+static void ar9280DisablePCIE(struct ath_hal *ah);
static HAL_BOOL ar9280FillCapabilityInfo(struct ath_hal *ah);
static void ar9280WriteIni(struct ath_hal *ah,
const struct ieee80211_channel *chan);
@@ -187,6 +188,7 @@ ar9280Attach(uint16_t devid, HAL_SOFTC s
ah->ah_setAntennaSwitch = ar9280SetAntennaSwitch;
ah->ah_configPCIE = ar9280ConfigPCIE;
+ ah->ah_disablePCIE = ar9280DisablePCIE;
AH5416(ah)->ah_cal.iqCalData.calData = &ar9280_iq_cal;
AH5416(ah)->ah_cal.adcGainCalData.calData = &ar9280_adc_gain_cal;
@@ -426,6 +428,12 @@ ar9280ConfigPCIE(struct ath_hal *ah, HAL
}
static void
+ar9280DisablePCIE(struct ath_hal *ah)
+{
+ /* XXX TODO */
+}
+
+static void
ar9280WriteIni(struct ath_hal *ah, const struct ieee80211_channel *chan)
{
u_int modesIndex, freqIndex;
Modified: head/sys/dev/ath/ath_hal/ar9002/ar9285_attach.c
==============================================================================
--- head/sys/dev/ath/ath_hal/ar9002/ar9285_attach.c Fri May 25 01:48:15
2012 (r235956)
+++ head/sys/dev/ath/ath_hal/ar9002/ar9285_attach.c Fri May 25 02:07:59
2012 (r235957)
@@ -67,6 +67,7 @@ static const HAL_PERCAL_DATA ar9280_adc_
};
static void ar9285ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore);
+static void ar9285DisablePCIE(struct ath_hal *ah);
static HAL_BOOL ar9285FillCapabilityInfo(struct ath_hal *ah);
static void ar9285WriteIni(struct ath_hal *ah,
const struct ieee80211_channel *chan);
@@ -152,6 +153,7 @@ ar9285Attach(uint16_t devid, HAL_SOFTC s
ah->ah_setAntennaSwitch = ar9285SetAntennaSwitch;
ah->ah_configPCIE = ar9285ConfigPCIE;
+ ah->ah_disablePCIE = ar9285DisablePCIE;
ah->ah_setTxPower = ar9285SetTransmitPower;
ah->ah_setBoardValues = ar9285SetBoardValues;
@@ -373,6 +375,12 @@ ar9285ConfigPCIE(struct ath_hal *ah, HAL
}
static void
+ar9285DisablePCIE(struct ath_hal *ah)
+{
+ /* XXX TODO */
+}
+
+static void
ar9285WriteIni(struct ath_hal *ah, const struct ieee80211_channel *chan)
{
u_int modesIndex, freqIndex;
Modified: head/sys/dev/ath/ath_hal/ar9002/ar9287_attach.c
==============================================================================
--- head/sys/dev/ath/ath_hal/ar9002/ar9287_attach.c Fri May 25 01:48:15
2012 (r235956)
+++ head/sys/dev/ath/ath_hal/ar9002/ar9287_attach.c Fri May 25 02:07:59
2012 (r235957)
@@ -66,6 +66,7 @@ static const HAL_PERCAL_DATA ar9287_adc_
};
static void ar9287ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore);
+static void ar9287DisablePCIE(struct ath_hal *ah);
static HAL_BOOL ar9287FillCapabilityInfo(struct ath_hal *ah);
static void ar9287WriteIni(struct ath_hal *ah,
const struct ieee80211_channel *chan);
@@ -141,6 +142,7 @@ ar9287Attach(uint16_t devid, HAL_SOFTC s
ah->ah_setAntennaSwitch = ar9287SetAntennaSwitch;
ah->ah_configPCIE = ar9287ConfigPCIE;
+ ah->ah_disablePCIE = ar9287DisablePCIE;
AH5416(ah)->ah_cal.iqCalData.calData = &ar9287_iq_cal;
AH5416(ah)->ah_cal.adcGainCalData.calData = &ar9287_adc_gain_cal;
@@ -368,6 +370,12 @@ ar9287ConfigPCIE(struct ath_hal *ah, HAL
}
static void
+ar9287DisablePCIE(struct ath_hal *ah)
+{
+ /* XXX TODO */
+}
+
+static void
ar9287WriteIni(struct ath_hal *ah, const struct ieee80211_channel *chan)
{
u_int modesIndex, freqIndex;
Modified: head/sys/dev/ath/if_ath.c
==============================================================================
--- head/sys/dev/ath/if_ath.c Fri May 25 01:48:15 2012 (r235956)
+++ head/sys/dev/ath/if_ath.c Fri May 25 02:07:59 2012 (r235957)
@@ -1318,6 +1318,9 @@ ath_suspend(struct ath_softc *sc)
* mode; pci will power off our socket on suspend and
* CardBus detaches the device.
*/
+
+ /* For PCIe, this matters */
+ ath_hal_disablepcie(sc->sc_ah);
}
/*
@@ -1350,6 +1353,9 @@ ath_resume(struct ath_softc *sc)
DPRINTF(sc, ATH_DEBUG_ANY, "%s: if_flags %x\n",
__func__, ifp->if_flags);
+ /* Re-enable PCIe, re-enable the PCIe bus */
+ ath_hal_enablepcie(ah, 1);
+
/*
* Must reset the chip before we reload the
* keycache as we were powered down on suspend.
Modified: head/sys/dev/ath/if_athvar.h
==============================================================================
--- head/sys/dev/ath/if_athvar.h Fri May 25 01:48:15 2012
(r235956)
+++ head/sys/dev/ath/if_athvar.h Fri May 25 02:07:59 2012
(r235957)
@@ -996,6 +996,14 @@ void ath_intr(void *);
((*(_ah)->ah_gpioSetIntr)((_ah), (_gpio), (_b)))
/*
+ * PCIe suspend/resume/poweron/poweroff related macros
+ */
+#define ath_hal_enablepcie(_ah, _restore) \
+ ((*(_ah)->ah_configPCIE)((_ah), (_restore)))
+#define ath_hal_disablepcie(_ah) \
+ ((*(_ah)->ah_disablePCIE)((_ah)))
+
+/*
* This is badly-named; you need to set the correct parameters
* to begin to receive useful radar events; and even then
* it doesn't "enable" DFS. See the ath_dfs/null/ module for
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