Author: gonzo
Date: Wed Aug 22 22:48:50 2012
New Revision: 239597
URL: http://svn.freebsd.org/changeset/base/239597
Log:
Do not change "cachable" attribute for DMA memory allocated with
BUS_DMA_COHERENT attribute
The minimum unit for changing "cachable" attribute is page, so call
to pmap_change_attr effectively disable cache for all pages that newly
allocated DMA memory region spans on. The problem is that general-purpose
memory could reside on these pages too and disabling cache might affect
performance. Moreover ldrex/strex operators raise Data Abort exception
when accessing memory on page with "cachable" attribute off.
BUS_DMA_COHERENT does nto require memory to be coherent. It just suggests
to do best effort for reducing synchronization overhead.
Modified:
head/sys/arm/arm/busdma_machdep-v6.c
Modified: head/sys/arm/arm/busdma_machdep-v6.c
==============================================================================
--- head/sys/arm/arm/busdma_machdep-v6.c Wed Aug 22 22:34:55 2012
(r239596)
+++ head/sys/arm/arm/busdma_machdep-v6.c Wed Aug 22 22:48:50 2012
(r239597)
@@ -618,10 +618,6 @@ bus_dmamem_alloc(bus_dma_tag_t dmat, voi
}
dmat->map_count++;
- if (flags & BUS_DMA_COHERENT)
- pmap_change_attr((vm_offset_t)*vaddr, len,
- BUS_DMA_NOCACHE);
-
CTR4(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d",
__func__, dmat, dmat->flags, 0);
return (0);
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