Author: ian
Date: Thu Sep 4 03:04:37 2014
New Revision: 271084
URL: http://svnweb.freebsd.org/changeset/base/271084
Log:
The imx5x and imx6 chips have an onboard IOMUX device which also contains a
few "general purpose registers" whose values control chip behavior in ways
that have nothing to do with IO pin mux control. Define a simple API that
other soc-specific code can use to read and write the registers, and provide
the imx51 implementation of them.
Added:
head/sys/arm/freescale/imx/imx_iomuxvar.h (contents, props changed)
Modified:
head/sys/arm/freescale/imx/imx51_iomux.c
Modified: head/sys/arm/freescale/imx/imx51_iomux.c
==============================================================================
--- head/sys/arm/freescale/imx/imx51_iomux.c Thu Sep 4 02:28:17 2014
(r271083)
+++ head/sys/arm/freescale/imx/imx51_iomux.c Thu Sep 4 03:04:37 2014
(r271084)
@@ -74,6 +74,7 @@ __FBSDID("$FreeBSD$");
#include <dev/ofw/ofw_bus.h>
#include <dev/ofw/ofw_bus_subr.h>
+#include <arm/freescale/imx/imx_iomuxvar.h>
#include <arm/freescale/imx/imx51_iomuxvar.h>
#include <arm/freescale/imx/imx51_iomuxreg.h>
@@ -216,6 +217,41 @@ iomux_input_config(const struct iomux_in
}
#endif
+uint32_t
+imx_iomux_gpr_get(u_int regnum)
+{
+
+ KASSERT(iomuxsc != NULL, ("imx_iomux_gpr_get() called before attach"));
+ KASSERT(regnum >= 0 && renum <= 1,
+ ("imx_iomux_gpr_get bad regnum %u", regnum));
+ return (IOMUX_READ(iomuxsc, IOMUXC_GPR0 + regnum));
+}
+
+void
+imx_iomux_gpr_set(u_int regnum, uint32_t val)
+{
+
+ KASSERT(iomuxsc != NULL, ("imx_iomux_gpr_set() called before attach"));
+ KASSERT(regnum >= 0 && renum <= 1,
+ ("imx_iomux_gpr_set bad regnum %u", regnum));
+ IOMUX_WRITE(iomuxsc, IOMUXC_GPR0 + regnum, val);
+}
+
+void
+imx_iomux_gpr_set_masked(u_int regnum, uint32_t clrbits, uint32_t setbits)
+{
+ uint32_t val;
+
+ KASSERT(iomuxsc != NULL,
+ ("imx_iomux_gpr_set_masked called before attach"));
+ KASSERT(regnum >= 0 && renum <= 1,
+ ("imx_iomux_gpr_set_masked bad regnum %u", regnum));
+
+ val = IOMUX_READ(iomuxsc, IOMUXC_GPR0 + regnum);
+ val = (val & ~clrbits) | setbits;
+ IOMUX_WRITE(iomuxsc, IOMUXC_GPR0 + regnum, val);
+}
+
static device_method_t imx_iomux_methods[] = {
DEVMETHOD(device_probe, iomux_probe),
DEVMETHOD(device_attach, iomux_attach),
Added: head/sys/arm/freescale/imx/imx_iomuxvar.h
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/sys/arm/freescale/imx/imx_iomuxvar.h Thu Sep 4 03:04:37 2014
(r271084)
@@ -0,0 +1,42 @@
+/*-
+ * Copyright (c) 2014 Ian Lepore <i...@freebsd.org>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+
+#ifndef IMX_IOMUXVAR_H
+#define IMX_IOMUXVAR_H
+
+/*
+ * The IOMUX Controller device has a small set of "general purpose registers"
+ * which control various aspects of SoC operation that really have nothing to
do
+ * with IO pin assignments or pad control. These functions let other soc level
+ * code manipulate these values.
+ */
+uint32_t imx_iomux_gpr_get(u_int regnum);
+void imx_iomux_gpr_set(u_int regnum, uint32_t val);
+void imx_iomux_gpr_set_masked(u_int regnum, uint32_t clrbits, uint32_t
setbits);
+
+#endif
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