Author: andrew Date: Tue Apr 28 16:47:34 2015 New Revision: 282151 URL: https://svnweb.freebsd.org/changeset/base/282151
Log: Fix pmap_dcache_wb_pou in the new armv6 pmap to correctly achieve icache consistency from ptrace. PR: 199739 Submitted by: Jurgen Weiss <weiss at uni-mainz.de> (original version) Submitted by: Svatopluk Kraus <onwahe at gmail.com> Modified: head/sys/arm/arm/pmap-v6-new.c Modified: head/sys/arm/arm/pmap-v6-new.c ============================================================================== --- head/sys/arm/arm/pmap-v6-new.c Tue Apr 28 16:28:29 2015 (r282150) +++ head/sys/arm/arm/pmap-v6-new.c Tue Apr 28 16:47:34 2015 (r282151) @@ -6094,13 +6094,13 @@ pmap_set_pcb_pagedir(pmap_t pmap, struct /* - * Clean L1 data cache range on a single page, which is not mapped yet. + * Clean L1 data cache range by physical address. + * The range must be within a single page. */ static void pmap_dcache_wb_pou(vm_paddr_t pa, vm_size_t size, vm_memattr_t ma) { struct sysmaps *sysmaps; - vm_offset_t va; KASSERT(((pa & PAGE_MASK) + size) <= PAGE_SIZE, ("%s: not on single page", __func__)); @@ -6111,9 +6111,8 @@ pmap_dcache_wb_pou(vm_paddr_t pa, vm_siz if (*sysmaps->CMAP3) panic("%s: CMAP3 busy", __func__); pte2_store(sysmaps->CMAP3, PTE2_KERN_NG(pa, PTE2_AP_KRW, ma)); - va = (vm_offset_t)sysmaps->CADDR3; - tlb_flush_local(va); - dcache_wb_pou(va, size); + tlb_flush_local((vm_offset_t)sysmaps->CADDR3); + dcache_wb_pou((vm_offset_t)sysmaps->CADDR3 + (pa & PAGE_MASK), size); pte2_clear(sysmaps->CMAP3); sched_unpin(); mtx_unlock(&sysmaps->lock); _______________________________________________ svn-src-head@freebsd.org mailing list http://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"