Author: skra
Date: Thu Feb 18 09:28:16 2016
New Revision: 295751
URL: https://svnweb.freebsd.org/changeset/base/295751
Log:
Remove redundant L2_ADDR_MASK definition and replace it by primary one.
Modified:
head/sys/arm/arm/pmap.c
head/sys/arm/include/pte.h
Modified: head/sys/arm/arm/pmap.c
==============================================================================
--- head/sys/arm/arm/pmap.c Thu Feb 18 09:26:58 2016 (r295750)
+++ head/sys/arm/arm/pmap.c Thu Feb 18 09:28:16 2016 (r295751)
@@ -2549,7 +2549,7 @@ pmap_remove_pages(pmap_t pmap)
l2b = pmap_get_l2_bucket(pmap, pv->pv_va);
KASSERT(l2b != NULL, ("No L2 bucket in pmap_remove_pages"));
pt = &l2b->l2b_kva[l2pte_index(pv->pv_va)];
- m = PHYS_TO_VM_PAGE(*pt & L2_ADDR_MASK);
+ m = PHYS_TO_VM_PAGE(*pt & L2_S_FRAME);
KASSERT((vm_offset_t)m >= KERNBASE, ("Trying to access
non-existent page va %x pte %x", pv->pv_va, *pt));
*pt = 0;
PTE_SYNC(pt);
Modified: head/sys/arm/include/pte.h
==============================================================================
--- head/sys/arm/include/pte.h Thu Feb 18 09:26:58 2016 (r295750)
+++ head/sys/arm/include/pte.h Thu Feb 18 09:28:16 2016 (r295751)
@@ -72,9 +72,6 @@ typedef pt_entry_t pt2_entry_t; /* comp
#define L2_MASK 0x03 /* Mask for L2 entry type */
#define L2_INVAL 0x00 /* L2 invalid type */
-/* L1 and L2 address masks */
-#define L2_ADDR_MASK 0xfffff000
-
/*
* The ARM MMU architecture was introduced with ARM v3 (previous ARM
* architecture versions used an optional off-CPU memory controller
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