Author: andrew
Date: Mon Apr 18 10:37:50 2016
New Revision: 298202
URL: https://svnweb.freebsd.org/changeset/base/298202
Log:
Pull the MSI/MSI-X handling functions out to help with INTRNG integration.
Obtained from: ABT Systems Ltd
Sponsored by: The FreeBSD Foundation
Modified:
head/sys/dev/pci/pci_host_generic.c
Modified: head/sys/dev/pci/pci_host_generic.c
==============================================================================
--- head/sys/dev/pci/pci_host_generic.c Mon Apr 18 09:56:41 2016
(r298201)
+++ head/sys/dev/pci/pci_host_generic.c Mon Apr 18 10:37:50 2016
(r298202)
@@ -656,6 +656,63 @@ generic_pcie_deactivate_resource(device_
return (res);
}
+static int
+generic_pcie_alloc_msi(device_t pci, device_t child, int count, int maxcount,
+ int *irqs)
+{
+
+#if defined(__aarch64__)
+ return (arm_alloc_msi(pci, child, count, maxcount, irqs));
+#else
+ return (ENXIO);
+#endif
+}
+
+static int
+generic_pcie_release_msi(device_t pci, device_t child, int count, int *irqs)
+{
+
+#if defined(__aarch64__)
+ return (arm_release_msi(pci, child, count, irqs));
+#else
+ return (ENXIO);
+#endif
+}
+
+static int
+generic_pcie_map_msi(device_t pci, device_t child, int irq, uint64_t *addr,
+ uint32_t *data)
+{
+
+#if defined(__aarch64__)
+ return (arm_map_msi(pci, child, irq, addr, data));
+#else
+ return (ENXIO);
+#endif
+}
+
+static int
+generic_pcie_alloc_msix(device_t pci, device_t child, int *irq)
+{
+
+#if defined(__aarch64__)
+ return (arm_alloc_msix(pci, child, irq));
+#else
+ return (ENXIO);
+#endif
+}
+
+static int
+generic_pcie_release_msix(device_t pci, device_t child, int irq)
+{
+
+#if defined(__aarch64__)
+ return (arm_release_msix(pci, child, irq));
+#else
+ return (ENXIO);
+#endif
+}
+
static device_method_t generic_pcie_methods[] = {
DEVMETHOD(device_probe, generic_pcie_probe),
DEVMETHOD(device_attach, pci_host_generic_attach),
@@ -674,13 +731,11 @@ static device_method_t generic_pcie_meth
DEVMETHOD(pcib_route_interrupt, generic_pcie_route_interrupt),
DEVMETHOD(pcib_read_config, generic_pcie_read_config),
DEVMETHOD(pcib_write_config, generic_pcie_write_config),
-#if defined(__aarch64__)
- DEVMETHOD(pcib_alloc_msi, arm_alloc_msi),
- DEVMETHOD(pcib_release_msi, arm_release_msi),
- DEVMETHOD(pcib_alloc_msix, arm_alloc_msix),
- DEVMETHOD(pcib_release_msix, arm_release_msix),
- DEVMETHOD(pcib_map_msi, arm_map_msi),
-#endif
+ DEVMETHOD(pcib_alloc_msi, generic_pcie_alloc_msi),
+ DEVMETHOD(pcib_release_msi, generic_pcie_release_msi),
+ DEVMETHOD(pcib_alloc_msix, generic_pcie_alloc_msix),
+ DEVMETHOD(pcib_release_msix, generic_pcie_release_msix),
+ DEVMETHOD(pcib_map_msi, generic_pcie_map_msi),
/* ofw_bus interface */
DEVMETHOD(ofw_bus_get_devinfo, generic_pcie_ofw_get_devinfo),
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