Author: andrew Date: Fri May 20 15:43:51 2016 New Revision: 300308 URL: https://svnweb.freebsd.org/changeset/base/300308
Log: Extract the correct bits from the GICD_TYPER register. The interrupt count is encoded in the bottom 5 bits. Obtained from: ABT Systems Ltd Sponsored by: The FreeBSD Foundation Modified: head/sys/arm64/arm64/gic_v3_reg.h Modified: head/sys/arm64/arm64/gic_v3_reg.h ============================================================================== --- head/sys/arm64/arm64/gic_v3_reg.h Fri May 20 15:41:05 2016 (r300307) +++ head/sys/arm64/arm64/gic_v3_reg.h Fri May 20 15:43:51 2016 (r300308) @@ -67,7 +67,7 @@ #define GICD_TYPER (0x0004) #define GICD_TYPER_IDBITS(n) ((((n) >> 19) & 0x1F) + 1) -#define GICD_TYPER_I_NUM(n) ((((n) & 0xF1) + 1) * 32) +#define GICD_TYPER_I_NUM(n) ((((n) & 0x1F) + 1) * 32) #define GICD_ISENABLER(n) (0x0100 + (((n) >> 5) * 4)) #define GICD_I_PER_ISENABLERn (32) _______________________________________________ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
