Author: andrew
Date: Fri Oct 14 22:20:14 2016
New Revision: 307334
URL: https://svnweb.freebsd.org/changeset/base/307334
Log:
Create macros for the MAIR memory attributes. While here add an uncached
memory type, however the VM code still needs to be taught about this.
MFC after: 1 week
Sponsored by: ABT Systems Ltd
Modified:
head/sys/arm64/arm64/locore.S
head/sys/arm64/include/armreg.h
Modified: head/sys/arm64/arm64/locore.S
==============================================================================
--- head/sys/arm64/arm64/locore.S Fri Oct 14 21:51:50 2016
(r307333)
+++ head/sys/arm64/arm64/locore.S Fri Oct 14 22:20:14 2016
(r307334)
@@ -617,8 +617,10 @@ start_mmu:
.align 3
mair:
- /* Device Normal, no cache Normal, write-back */
- .quad MAIR_ATTR(0x00, 0) | MAIR_ATTR(0x44, 1) | MAIR_ATTR(0xff, 2)
+ .quad MAIR_ATTR(MAIR_DEVICE_nGnRnE, 0) | \
+ MAIR_ATTR(MAIR_NORMAL_NC, 1) | \
+ MAIR_ATTR(MAIR_NORMAL_WB, 2) | \
+ MAIR_ATTR(MAIR_NORMAL_WT, 3)
tcr:
.quad (TCR_TxSZ(64 - VIRT_BITS) | TCR_ASID_16 | TCR_TG1_4K | \
TCR_CACHE_ATTRS | TCR_SMP_ATTRS)
Modified: head/sys/arm64/include/armreg.h
==============================================================================
--- head/sys/arm64/include/armreg.h Fri Oct 14 21:51:50 2016
(r307333)
+++ head/sys/arm64/include/armreg.h Fri Oct 14 22:20:14 2016
(r307334)
@@ -357,6 +357,10 @@
/* MAIR_EL1 - Memory Attribute Indirection Register */
#define MAIR_ATTR_MASK(idx) (0xff << ((n)* 8))
#define MAIR_ATTR(attr, idx) ((attr) << ((idx) * 8))
+#define MAIR_DEVICE_nGnRnE 0x00
+#define MAIR_NORMAL_NC 0x44
+#define MAIR_NORMAL_WT 0x88
+#define MAIR_NORMAL_WB 0xff
/* PAR_EL1 - Physical Address Register */
#define PAR_F_SHIFT 0
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