Author: ian
Date: Fri Feb 13 23:34:40 2015
New Revision: 278732
URL: https://svnweb.freebsd.org/changeset/base/278732
Log:
MFC r277555, r277568:
Enable all sd device clocks on imx6.
Add imx5/6 pinmux driver support for encoded input register configs.
Modified:
stable/10/sys/arm/freescale/imx/imx6_ccm.c
stable/10/sys/arm/freescale/imx/imx_iomux.c
Directory Properties:
stable/10/ (props changed)
Modified: stable/10/sys/arm/freescale/imx/imx6_ccm.c
==============================================================================
--- stable/10/sys/arm/freescale/imx/imx6_ccm.c Fri Feb 13 23:32:03 2015
(r278731)
+++ stable/10/sys/arm/freescale/imx/imx6_ccm.c Fri Feb 13 23:34:40 2015
(r278732)
@@ -95,7 +95,7 @@ ccm_init_gates(struct ccm_softc *sc)
WR4(sc, CCM_CCGR3, 0x3ff00000); /* DDR memory controller */
WR4(sc, CCM_CCGR4, 0x0000f300); /* pl301 bus crossbar */
WR4(sc, CCM_CCGR5, 0x0f000000); /* uarts */
- WR4(sc, CCM_CCGR6, 0x000000cc); /* usdhc 1 & 3 */
+ WR4(sc, CCM_CCGR6, 0x000000ff); /* usdhc 1-4 */
}
static int
Modified: stable/10/sys/arm/freescale/imx/imx_iomux.c
==============================================================================
--- stable/10/sys/arm/freescale/imx/imx_iomux.c Fri Feb 13 23:32:03 2015
(r278731)
+++ stable/10/sys/arm/freescale/imx/imx_iomux.c Fri Feb 13 23:34:40 2015
(r278732)
@@ -117,10 +117,36 @@ WR4(struct iomux_softc *sc, bus_size_t o
bus_write_4(sc->mem_res, off, val);
}
+static void
+iomux_configure_input(struct iomux_softc *sc, uint32_t reg, uint32_t val)
+{
+ u_int select, mask, shift, width;
+
+ /* If register and value are zero, there is nothing to configure. */
+ if (reg == 0 && val == 0)
+ return;
+
+ /*
+ * If the config value has 0xff in the high byte it is encoded:
+ * 31 23 15 7 0
+ * | 0xff | shift | width | select |
+ * We need to mask out the old select value and OR in the new, using a
+ * mask of the given width and shifting the values up by shift.
+ */
+ if ((val & 0xff000000) == 0xff000000) {
+ select = val & 0x000000ff;
+ width = (val & 0x0000ff00) >> 8;
+ shift = (val & 0x00ff0000) >> 16;
+ mask = ((1u << width) - 1) << shift;
+ val = (RD4(sc, reg) & ~mask) | (select << shift);
+ }
+ WR4(sc, reg, val);
+}
+
static int
iomux_configure_pins(device_t dev, phandle_t cfgxref)
{
- struct iomux_softc * sc;
+ struct iomux_softc *sc;
struct pincfg *cfgtuples, *cfg;
phandle_t cfgnode;
int i, ntuples;
@@ -137,8 +163,7 @@ iomux_configure_pins(device_t dev, phand
for (i = 0, cfg = cfgtuples; i < ntuples; i++, cfg++) {
sion = (cfg->padconf_val & PADCONF_SION) ? PADMUX_SION : 0;
WR4(sc, cfg->mux_reg, cfg->mux_val | sion);
- if (cfg->input_reg != 0)
- WR4(sc, cfg->input_reg, cfg->input_val);
+ iomux_configure_input(sc, cfg->input_reg, cfg->input_val);
if ((cfg->padconf_val & PADCONF_NONE) == 0)
WR4(sc, cfg->padconf_reg, cfg->padconf_val);
if (bootverbose) {
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