Ahmed, I suspect this is just LLVM and Clang getting out of sync, and the next build should pass?
/home/buildnode/jenkins/workspace/oss-swift-incremental-RA-linux-ubuntu-16_10-long-test/llvm/tools/clang/lib/CodeGen/CodeGenAction.cpp:278:45: error: no type named 'DiagnosticInfoWithDebugLocBase' in namespace 'llvm'; did you mean 'DiagnosticInfoWithLocationBase'? Jordan > On Feb 24, 2017, at 13:02, no-re...@swift.org wrote: > > [FAILURE] oss-swift-incremental-RA-linux-ubuntu-16_10-long-test [#785] > > Build URL: > https://ci.swift.org/job/oss-swift-incremental-RA-linux-ubuntu-16_10-long-test/785/ > > <https://ci.swift.org/job/oss-swift-incremental-RA-linux-ubuntu-16_10-long-test/785/> > Project: oss-swift-incremental-RA-linux-ubuntu-16_10-long-test > Date of build: Fri, 24 Feb 2017 12:52:00 -0800 > Build duration: 10 min > Identified problems: > > Compile Error: This build failed because of a compile error. Below is a list > of all errors in the build log: > Indication 1 > <https://ci.swift.org//job/oss-swift-incremental-RA-linux-ubuntu-16_10-long-test/785/consoleFull#150703499ee1a197b-acac-4b17-83cf-a53b95139a76> > Changes > > Commit 13287514a013614e95418c459a5416db6b599830 by hughbellars: > Get the REPL building on Linux > > edit: lib/Immediate/REPL.cpp > edit: CMakeLists.txt > > Commit 8943ad6cc402a66eedb91c741044f61e2d5c1b5a by hughbellars: > Improve the error message for an unsupported system or architecture in > > edit: utils/swift_build_support/swift_build_support/targets.py > > Commit 184b6394f01ce426b7fafa980a39dffc6faea99d by hughbellars: > Improve the error message for a platform without a Toolchain > > edit: utils/swift_build_support/swift_build_support/toolchain.py > > Commit 00b8913efa28360962bc172891aecb23fa3409ba by hughbellars: > Fix mismatching path to ICU source in build-script and build-script-impl > > edit: utils/swift_build_support/swift_build_support/products/product.py > edit: utils/build-script > edit: utils/swift_build_support/swift_build_support/products/libicu.py > > Commit bab7bbd283f8e015aedf15e804ecd570cba2a4a7 by hughbellars: > Report a fatal error in build-script rather than build-script-impl for > > edit: utils/build-script > edit: utils/build-script-impl > > Commit 83795ecd066f4849c0b0ee5817a8ca87593c81f8 by hughbellars: > Fix source code paths of corelibs products in build-sciript > > edit: utils/swift_build_support/swift_build_support/products/foundation.py > edit: utils/swift_build_support/swift_build_support/products/xctest.py > edit: utils/swift_build_support/swift_build_support/products/libdispatch.py > > Commit 904ef577d2e700aac6d82563872e1ab1240c7ca8 by hughbellars: > Cleanup android import in build-script > > add: utils/android/__init__.py > edit: utils/build-script > > Commit 409a214f8505b8b1ecf0607256146fa11eaf018b by hughbellars: > Fix build-script shell to work on Windows > > edit: utils/swift_build_support/swift_build_support/shell.py > > Commit cac44b2a33568707b93371ad3be26930741e97de by jordan_rose: > Disable Foundation.Data test that fails with resilience enabled. > > edit: test/stdlib/TestData.swift > > Commit d697c2fdcb7770521a8a119dce91d61386508059 by dgregor: > [GenericSig Builder] Diagnose redundant same-typeo-t-concrete > > edit: include/swift/AST/DiagnosticsSema.def > edit: include/swift/AST/GenericSignatureBuilder.h > edit: lib/AST/GenericSignatureBuilder.cpp > edit: test/attr/attr_specialize.swift > edit: test/Constraints/same_types.swift > > Commit a23b44fa96de8d0d236b1a52853a4cb2999ad422 by ahmed.bougacha: > [GlobalISel] Simplify StringRef parameters. NFC. > > edit: utils/TableGen/GlobalISelEmitter.cpp > > Commit ca388a5e95145417b25b2aa57b3a91d602c4ea9b by ahmed.bougacha: > [GlobalISel] Return an Expected for each SDAG pattern. NFC. > > edit: utils/TableGen/GlobalISelEmitter.cpp > > Commit e6295822fcb99b1a0cada5da7a2ddff04520ccaf by ahmed.bougacha: > [Tablegen] Instrumenting table gen DAGGenISelDAG > > edit: lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp > edit: CMakeLists.txt > edit: utils/TableGen/DAGISelMatcherEmitter.cpp > edit: cmake/modules/TableGen.cmake > edit: include/llvm/CodeGen/SelectionDAGISel.h > > Commit 9198723576557d4a99f8d7a3631f65fdbe384715 by ahmed.bougacha: > [globalisel] Separate the SelectionDAG importer from the emitter. NFC > > edit: utils/TableGen/GlobalISelEmitter.cpp > > Commit d5eebbefa9728cf797017b78ba738faa1e80e8a7 by ahmed.bougacha: > [globalisel] OperandPredicateMatcher's shouldn't need to generate the > > edit: test/TableGen/GlobalISelEmitter.td > edit: utils/TableGen/GlobalISelEmitter.cpp > > Commit a6c10f8bbe2f89eb1830e4b68b2300d206991aa9 by ahmed.bougacha: > tablegen: Fix android build > > edit: utils/TableGen/GlobalISelEmitter.cpp > > Commit 3a8ae81bb307acd6216c546f2d1d008f379c3f52 by ahmed.bougacha: > MIRTests: Remove unnecessary 2>&1 redirection > > edit: test/CodeGen/AVR/pseudo/ASRWRd.mir > edit: test/CodeGen/AVR/pseudo/PUSHWRr.mir > edit: test/CodeGen/AVR/pseudo/ZEXT.mir > edit: test/CodeGen/AVR/pseudo/LSLWRd.mir > edit: test/CodeGen/AArch64/GlobalISel/legalize-and.mir > edit: test/CodeGen/AArch64/GlobalISel/legalize-itofp.mir > edit: test/CodeGen/AVR/pseudo/ADDWRdRr.mir > edit: test/CodeGen/AArch64/GlobalISel/legalize-shift.mir > edit: test/CodeGen/AVR/pseudo/CPCWRdRr.mir > edit: test/CodeGen/AVR/pseudo/EORWRdRr.mir > edit: test/CodeGen/AVR/pseudo/expand-lddw-dst-src-same.mir > edit: test/CodeGen/AArch64/GlobalISel/legalize-rem.mir > edit: test/CodeGen/AArch64/GlobalISel/legalize-or.mir > edit: test/CodeGen/AArch64/arm64-regress-opt-cmp.mir > edit: test/CodeGen/AArch64/GlobalISel/legalize-constant.mir > edit: test/CodeGen/AVR/pseudo/SBCIWRdK.mir > edit: test/CodeGen/AVR/pseudo/SUBIWRdK.mir > edit: test/CodeGen/AArch64/GlobalISel/legalize-simple.mir > edit: test/CodeGen/AVR/pseudo/LDWRdPtrPi.mir > edit: test/CodeGen/AVR/pseudo/COMWRd.mir > edit: test/CodeGen/AVR/pseudo/LDWRdPtrPd.mir > edit: test/CodeGen/AArch64/GlobalISel/legalize-load-store.mir > edit: test/CodeGen/AArch64/GlobalISel/legalize-fcmp.mir > edit: test/CodeGen/AArch64/GlobalISel/legalize-fptoi.mir > edit: test/CodeGen/AArch64/GlobalISel/legalize-gep.mir > edit: test/CodeGen/AVR/pseudo/LDWRdPtr.mir > edit: test/CodeGen/Hexagon/expand-condsets-rm-reg.mir > edit: test/CodeGen/AVR/pseudo/POPWRd.mir > edit: test/CodeGen/AVR/pseudo/SEXT.mir > edit: test/CodeGen/AVR/pseudo/SUBWRdRr.mir > edit: test/CodeGen/AVR/pseudo/LDDWRdYQ.mir > edit: test/CodeGen/AVR/pseudo/STSWKRr.mir > edit: test/CodeGen/AVR/pseudo/INWRdA.mir > edit: test/CodeGen/AVR/pseudo/STWPtrPdRr.mir > edit: test/CodeGen/AVR/pseudo/ANDWRdRr.mir > edit: test/CodeGen/AVR/pseudo/CPWRdRr.mir > edit: test/CodeGen/AVR/pseudo/LSRWRd.mir > edit: test/CodeGen/AArch64/GlobalISel/legalize-add.mir > edit: test/CodeGen/AVR/pseudo/STWPtrRr.mir > edit: test/CodeGen/AArch64/movimm-wzr.mir > edit: test/CodeGen/MIR/Generic/machine-basic-block-ir-block-reference.mir > edit: test/CodeGen/X86/implicit-use-spill.mir > edit: test/CodeGen/AArch64/GlobalISel/legalize-combines.mir > edit: test/CodeGen/AVR/pseudo/LDSWRdK.mir > edit: test/CodeGen/AVR/relax-mem/STDWPtrQRr.mir > edit: test/CodeGen/AArch64/GlobalISel/legalize-pow.mir > edit: test/CodeGen/AArch64/ldst-opt.mir > edit: test/CodeGen/MIR/X86/expected-named-register-in-allocation-hint.mir > edit: test/CodeGen/AArch64/GlobalISel/legalize-ext.mir > edit: test/CodeGen/AVR/pseudo/OUTWARr.mir > edit: test/CodeGen/AVR/pseudo/ORWRdRr.mir > edit: test/CodeGen/AArch64/GlobalISel/legalize-div.mir > edit: test/CodeGen/AVR/pseudo/SBCWRdRr.mir > edit: test/CodeGen/AVR/pseudo/STDWPtrQRr.mir > edit: test/CodeGen/MIR/Generic/runPass.mir > edit: test/CodeGen/AArch64/GlobalISel/legalize-xor.mir > edit: test/CodeGen/AVR/pseudo/STWPtrPiRr.mir > edit: test/CodeGen/AArch64/GlobalISel/legalize-mul.mir > edit: test/CodeGen/AVR/pseudo/LDIWRdK.mir > edit: test/CodeGen/MIR/Generic/llvmIRMissing.mir > edit: test/CodeGen/AVR/pseudo/FRMIDX.mir > edit: test/CodeGen/AVR/pseudo/LDDWRdPtrQ.mir > edit: test/CodeGen/AArch64/GlobalISel/legalize-sub.mir > edit: test/CodeGen/AVR/pseudo/ADCWRdRr.mir > edit: test/CodeGen/AArch64/GlobalISel/legalize-vaarg.mir > edit: test/CodeGen/AVR/pseudo/ORIWRdK.mir > edit: test/CodeGen/AArch64/GlobalISel/legalize-inserts.mir > edit: test/CodeGen/AArch64/GlobalISel/legalize-cmp.mir > edit: test/CodeGen/AVR/pseudo/ANDIWRdK.mir > > Commit c73f00a86266c16e8755d6e35be371842c2821e9 by ahmed.bougacha: > [IR] Accept 'const Type &' in the Type operator<<. NFC. > > edit: include/llvm/IR/Type.h > > Commit ff2ee7ba05fa69bb43a2763e66ec44da5e20b608 by ahmed.bougacha: > [OptDiag] Pass const Values/Types to Argument. NFC. > > edit: include/llvm/IR/DiagnosticInfo.h > edit: lib/IR/DiagnosticInfo.cpp > > Commit 5b1a5b7108373e06cf1c3e8f44d0922979cb2ef3 by ahmed.bougacha: > [LazyBFI] Split out and templatize LazyBlockFrequencyInfo, NFC > > edit: include/llvm/Analysis/LazyBlockFrequencyInfo.h > > Commit e0eff680d1a9d8afc5fd3019b29bc99b7b872363 by ahmed.bougacha: > [OptDiag] Split code region out of DiagnosticInfoOptimizationBase > > edit: lib/Analysis/OptimizationDiagnosticInfo.cpp > edit: lib/IR/DiagnosticInfo.cpp > edit: include/llvm/IR/DiagnosticInfo.h > edit: include/llvm/Analysis/OptimizationDiagnosticInfo.h > > Commit 5afa3d2f3927ee88bdc1652bfaa288376f9192b9 by ahmed.bougacha: > New OptimizationRemarkEmitter pass for MIR > > add: lib/CodeGen/MachineOptimizationRemarkEmitter.cpp > edit: lib/CodeGen/MachineLoopInfo.cpp > add: include/llvm/CodeGen/MachineOptimizationRemarkEmitter.h > edit: include/llvm/CodeGen/MachineLoopInfo.h > edit: lib/Analysis/OptimizationDiagnosticInfo.cpp > edit: tools/llc/llc.cpp > edit: lib/CodeGen/RegAllocGreedy.cpp > edit: lib/CodeGen/CMakeLists.txt > edit: include/llvm/IR/DiagnosticInfo.h > edit: include/llvm/InitializePasses.h > add: test/CodeGen/AArch64/arm64-spill-remarks.ll > edit: include/llvm/Analysis/OptimizationDiagnosticInfo.h > edit: lib/IR/DiagnosticInfo.cpp > > Commit a354beebfbf9027040b935a942136be5793d8f3f by ahmed.bougacha: > [OptDiag] Predicates to check the same type of IR and MIR opt remarks > > edit: include/llvm/IR/DiagnosticInfo.h > > Commit 338d494e8a55b9b92c29f18d3053608a89b1a258 by ahmed.bougacha: > [LV] Also port failure remarks to new OptimizationRemarkEmitter API > > edit: lib/Analysis/OptimizationDiagnosticInfo.cpp > edit: test/Transforms/LoopVectorize/X86/vectorization-remarks-missed.ll > edit: include/llvm/IR/DiagnosticInfo.h > edit: lib/IR/DiagnosticInfo.cpp > edit: lib/Transforms/Vectorize/LoopVectorize.cpp > > Commit 4133147d20fb7a5f9a18a60889c2a3cb2304749b by ahmed.bougacha: > Add new pass LazyMachineBlockFrequencyInfo > > add: lib/CodeGen/LazyMachineBlockFrequencyInfo.cpp > edit: include/llvm/CodeGen/MachineBlockFrequencyInfo.h > edit: include/llvm/InitializePasses.h > edit: lib/CodeGen/CMakeLists.txt > edit: include/llvm/Analysis/LazyBranchProbabilityInfo.h > add: include/llvm/CodeGen/LazyMachineBlockFrequencyInfo.h > edit: lib/CodeGen/MachineBlockFrequencyInfo.cpp > edit: include/llvm/Analysis/LazyBlockFrequencyInfo.h > edit: lib/CodeGen/MachineOptimizationRemarkEmitter.cpp > > Commit 96ada06c9ba0c914f49297e2c0424e1370a91455 by ahmed.bougacha: > OptDiag: Rename DiagnosticInfoWithDebugLoc to WithLocation. NFC > > edit: include/llvm/IR/DiagnosticInfo.h > edit: lib/IR/DiagnosticInfo.cpp > > Commit 3d30146071bec21ff5037b853beb4b48871b4b58 by ahmed.bougacha: > OptDiag: Decouple backend diagnostics from debug info metadata > > edit: lib/IR/DiagnosticInfo.cpp > edit: include/llvm/IR/DiagnosticInfo.h > edit: lib/Analysis/OptimizationDiagnosticInfo.cpp > > Commit 82defe78ac42a514ecd5880835e7a834f558b021 by ahmed.bougacha: > OptDiag: Allow constructing DiagnosticLocation from DISubprograms > > edit: lib/Transforms/IPO/WholeProgramDevirt.cpp > edit: include/llvm/IR/DiagnosticInfo.h > edit: lib/IR/DiagnosticInfo.cpp > > Commit 15a29d4b589be0ecfecacb2391572ef3d8f42174 by ahmed.bougacha: > OptDiag: Add const to some interfaces that don't modify anything. NFC > > edit: include/llvm/Analysis/OptimizationDiagnosticInfo.h > edit: lib/IR/DiagnosticInfo.cpp > edit: include/llvm/IR/DiagnosticInfo.h > edit: lib/Analysis/OptimizationDiagnosticInfo.cpp > > Commit 489bb4c8a16930917b88cf30e652b14859d66cf3 by ahmed.bougacha: > [LazyMachineBFI] Reimplement with getAnalysisIfAvailable > > edit: include/llvm/CodeGen/LazyMachineBlockFrequencyInfo.h > edit: lib/CodeGen/LazyMachineBlockFrequencyInfo.cpp > edit: lib/CodeGen/MachineOptimizationRemarkEmitter.cpp > > Commit 358238588a1f1462643f315bcbb38e69a217ffc2 by ahmed.bougacha: > [ORE] Use const CodeRegions in the remark diagnostics. NFC. > > edit: include/llvm/IR/DiagnosticInfo.h > edit: lib/IR/DiagnosticInfo.cpp > > Commit 835c062ca33c13df941b8aa634e89dedcb2a2607 by ahmed.bougacha: > [CodeGen] Use const MBBs in the opt remark diagnostics. NFC. > > edit: include/llvm/CodeGen/MachineOptimizationRemarkEmitter.h > > Commit 868bbcd1755db49199bf6e71a887549e876a5d7e by ahmed.bougacha: > [CodeGen] Teach opt remarks how to print MI instructions. > > edit: include/llvm/CodeGen/MachineOptimizationRemarkEmitter.h > edit: lib/CodeGen/MachineOptimizationRemarkEmitter.cpp > > Commit 9a83386c87ff722834047da39a96eb87218bd914 by ahmed.bougacha: > OptDiag: Use DiagnosticLocation in MachineOptimizationRemarks > > edit: include/llvm/CodeGen/MachineOptimizationRemarkEmitter.h > > Commit 57cee20f3970242d05131820f4e31aa9400d9fbc by ahmed.bougacha: > [CodeGen] Add a way to SkipDebugLoc in MachineInstr::print(). NFC. > > edit: lib/CodeGen/MachineInstr.cpp > edit: include/llvm/CodeGen/MachineInstr.h > > Commit 24ba89a8e8b103ca4c93903d4a2c7af90a79efab by ahmed.bougacha: > [CodeGen] Print MI without a newline when skipping debugloc. NFC. > > edit: lib/CodeGen/MachineInstr.cpp > edit: include/llvm/CodeGen/MachineInstr.h > > Commit 62d85e3a37acd1af579a7c7376495dbbb019ccdf by ahmed.bougacha: > [GlobalISel] Simplify Select type cleanup using a ScopeExit. NFC. > > edit: lib/CodeGen/GlobalISel/InstructionSelect.cpp > > Commit 1def340748924699651c242f45ee9c021788ad1d by ahmed.bougacha: > [GlobalISel] Emit opt remarks on isel fallbacks. > > edit: lib/CodeGen/GlobalISel/Legalizer.cpp > edit: lib/CodeGen/GlobalISel/RegBankSelect.cpp > edit: include/llvm/CodeGen/GlobalISel/IRTranslator.h > edit: include/llvm/CodeGen/GlobalISel/Utils.h > edit: lib/CodeGen/GlobalISel/Utils.cpp > edit: test/CodeGen/AArch64/GlobalISel/arm64-fallback.ll > edit: lib/CodeGen/GlobalISel/InstructionSelect.cpp > edit: include/llvm/CodeGen/GlobalISel/RegBankSelect.h > edit: lib/CodeGen/GlobalISel/IRTranslator.cpp > > Commit 28950f8280c1dbf39f740bf4c24fe502bb50ee75 by ahmed.bougacha: > [GlobalISel] Finalize translated function on scope exit. NFC. > > edit: lib/CodeGen/GlobalISel/IRTranslator.cpp > > Commit a031926471eef783ddae63f4f0649a8001d55a82 by ahmed.bougacha: > [GlobalISel] Don't translate other blocks when one failed. > > edit: lib/CodeGen/GlobalISel/IRTranslator.cpp > > Commit e4443e91a901e063505efe42adc88f4c2413ff54 by ahmed.bougacha: > OptDiag: Summarize the instruction count in asm-printer > > edit: include/llvm/CodeGen/AsmPrinter.h > edit: lib/CodeGen/AsmPrinter/AsmPrinter.cpp > > Commit ea189a86bb0aeb15ee25f7a10aa000feb00a937d by ahmed.bougacha: > [GlobalISel] Remove now-unnecessary variable. NFC. > > edit: lib/CodeGen/GlobalISel/IRTranslator.cpp > > Commit 4a83241292ec231ebb9bc9ecd93725b7ff65cc26 by ahmed.bougacha: > [GlobalISel] Use the DISubprogram for translation failure remarks. > > edit: lib/CodeGen/GlobalISel/IRTranslator.cpp > edit: lib/CodeGen/GlobalISel/InstructionSelect.cpp > > Commit 9f353cbd2f16983bb527dd8fd30f6578019d6d5b by ahmed.bougacha: > [GlobalISel] Use the same name for all remarks. > > edit: lib/CodeGen/GlobalISel/IRTranslator.cpp > > Commit 7126d321f2406908e1d3513bbf8bb9ed7946429f by ahmed.bougacha: > Add missing initialization for MachineOptimizationRemarkEmitter > > edit: lib/CodeGen/CodeGen.cpp > > Commit c21d270f2982df28d980324decc92005ad422177 by ahmed.bougacha: > [llc] Add -pass-remarks-with-hotness > > edit: tools/llc/llc.cpp > edit: test/CodeGen/AArch64/arm64-spill-remarks.ll > > Commit ae42db12200bf2feef96cb66b96a888d37a61f96 by ahmed.bougacha: > [llc] Add -pass-remarks-output > > edit: tools/llc/llc.cpp > edit: lib/Analysis/OptimizationDiagnosticInfo.cpp > edit: test/CodeGen/AArch64/arm64-spill-remarks.ll
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