On Thu, Apr 01, 2010 at 05:37:13PM +0200, Christopher Zimmermann wrote:
> Hi,
>
> here's a patch for auich(4). It fixes some issues with SIS 7012
> and possibly others. But since it relies on correct behaviour of
> the hardware at some places it needs some testing. Especially try
> to run something like:
>
> aucat -l; play test.wav
>
> right after booting and before anything else is played or
> recorded.
>
> the typical output would be:
>
> auich0: ac97 link rate calibration took 83337 us
> sts=7<dch,celv,lvbci> civ=0 auich0: after calibration and reset
> sts=1<dch> civ=0 auich0: measured ac97 link rate at 47997 Hz,
> will use 48000 Hz auich_trigger_output(ed99000, eda7600, 11776,
> 0xffffffff80271e20, 0xffff80000015dc00, 0xffff80000015dd90)
> sts=1<dch> auich_trigger_pipe: qptr=0
> auich_trigger_input(eda9000, edb7600, 11776, 0xffffffff80272010,
> 0xffff80000015dc00, 0xffff80000015ddb8) sts=1<dch>
> auich_trigger_pipe: qptr=0 auich0: halt_input auich0: halt_output
>
> Important is the value of sts. dch means "DMA halted" - one
> should not set AUICH_RR before this bit is set.
> In auich_calibrate() I wait for any of the three bits
> <dch,celv,lvbci> to be set.
> If something goes wrong here you will see:
> auich0: ac97 link rate timed out %d us sts=%b civ=%d\n"
>
> If something goes wrong in halt_pipe you will see:
> auich_halt_pipe: halt took %d cycles
>
>
> please send me your dmesg if anything goes wrong or if you chip
> does set the sts flags in another way.
>
below is the result on the intel chip
> A short summary of the changes:
>
> - According to specification AUICH_RR may only be set after DMA
> is halted (AUICH_DCH is 0 in AUICH_STS). To accomplish this I
> revived auich_halt_pipe();
> - auich_calibrate() did not clear interrupt and event bits in
> AUICH_STS. Do that now. Further it did watch the CIV index
> counter to see when all samples are processed. I changed it to
> watch AUICH_STS instead and set LVI=CIV. therefore it won't
> change the CIV counter.
> - my last patch introduced a small bug in auich_trigger_pipe() I
> fixed that.
>
I think we should put the corresponding chunk in, sooner
than later.
BTW, I start wondering why this calibration exists at all?
do devices running at the wrong rate exist (which would mean
they don't have the proper clock). If so should we start
adding calibration code in all of our audio drivers?
-- Alexandre
OpenBSD 4.7-current (GENERIC) #1: Fri Apr 2 21:17:19 CEST 2010
a...@poc.localdomain:/usr/src/sys/arch/i386/compile/GENERIC
cpu0: Intel(R) Pentium(R) M processor 1.10GHz ("GenuineIntel" 686-class) 1.10
GHz
cpu0:
FPU,V86,DE,PSE,TSC,MSR,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,CFLUSH,DS,ACPI,MMX,FXSR,SSE,SSE2,SS,TM,SBF,EST,TM2
real mem = 526807040 (502MB)
avail mem = 501723136 (478MB)
mainbus0 at root
bios0 at mainbus0: AT/286+ BIOS, date 09/28/05, BIOS32 rev. 0 @ 0xfd740, SMBIOS
rev. 2.33 @ 0xe0010 (56 entries)
bios0: vendor IBM version "1UETC8WW (2.03 )" date 09/28/2005
bios0: IBM 2371CJ9
apm0 at bios0: Power Management spec V1.2
apm0: battery life expectancy 100%
apm0: AC on, battery charge high
acpi at bios0 function 0x0 not configured
pcibios0 at bios0: rev 2.1 @ 0xfd6d0/0x930
pcibios0: PCI IRQ Routing Table rev 1.0 @ 0xfdeb0/256 (14 entries)
pcibios0: PCI Interrupt Router at 000:31:0 ("Intel 82371FB ISA" rev 0x00)
pcibios0: PCI bus #3 is the last bus
bios0: ROM list: 0xc0000/0xc800! 0xcc800/0x1000 0xcd800/0x1000 0xdc000/0x4000!
0xe0000/0x10000
cpu0 at mainbus0: (uniprocessor)
cpu0: Enhanced SpeedStep 1097 MHz: speeds: 1100, 1000, 900, 800, 600 MHz
pci0 at mainbus0 bus 0: configuration mode 1 (bios)
io address conflict 0x5800/0x8
io address conflict 0x5808/0x4
io address conflict 0x5810/0x8
io address conflict 0x580c/0x4
mem address conflict 0x1f700000/0x400
pchb0 at pci0 dev 0 function 0 "Intel 82855GM Host" rev 0x02
"Intel 82855GM Memory" rev 0x02 at pci0 dev 0 function 1 not configured
"Intel 82855GM Config" rev 0x02 at pci0 dev 0 function 3 not configured
vga1 at pci0 dev 2 function 0 "Intel 82855GM Video" rev 0x02
wsdisplay0 at vga1 mux 1: console (80x25, vt100 emulation)
wsdisplay0: screen 1-5 added (80x25, vt100 emulation)
intagp0 at vga1
agp0 at intagp0: aperture at 0xe0000000, size 0x8000000
inteldrm0 at vga1: irq 11
drm0 at inteldrm0
"Intel 82855GM Video" rev 0x02 at pci0 dev 2 function 1 not configured
uhci0 at pci0 dev 29 function 0 "Intel 82801DB USB" rev 0x01: irq 11
uhci1 at pci0 dev 29 function 1 "Intel 82801DB USB" rev 0x01: irq 11
uhci2 at pci0 dev 29 function 2 "Intel 82801DB USB" rev 0x01: irq 11
ehci0 at pci0 dev 29 function 7 "Intel 82801DB USB" rev 0x01: irq 11
usb0 at ehci0: USB revision 2.0
uhub0 at usb0 "Intel EHCI root hub" rev 2.00/1.00 addr 1
ppb0 at pci0 dev 30 function 0 "Intel 82801BAM Hub-to-PCI" rev 0x81
pci1 at ppb0 bus 2
mem address conflict 0xb0000000/0x1000
cbb0 at pci1 dev 0 function 0 "Ricoh 5C476 CardBus" rev 0x8d: irq 11
sdhc0 at pci1 dev 0 function 1 "Ricoh 5C822 SD/MMC" rev 0x13: irq 11
sdmmc0 at sdhc0
em0 at pci1 dev 1 function 0 "Intel PRO/1000MT Mobile (82541GI)" rev 0x00: irq
11, address 00:0a:e4:37:79:dd
cardslot0 at cbb0 slot 0 flags 0
cardbus0 at cardslot0: bus 3 device 0 cacheline 0x0, lattimer 0xb0
pcmcia0 at cardslot0
ichpcib0 at pci0 dev 31 function 0 "Intel 82801DBM LPC" rev 0x01: 24-bit timer
at 3579545Hz
pciide0 at pci0 dev 31 function 1 "Intel 82801DBM IDE" rev 0x01: DMA, channel 0
configured to compatibility, channel 1 configured to compatibility
wd0 at pciide0 channel 0 drive 0: <HTC426020G7AT00>
wd0: 16-sector PIO, LBA, 19077MB, 39070080 sectors
wd0(pciide0:0:0): using PIO mode 4, Ultra-DMA mode 5
pciide0: channel 1 disabled (no drives)
ichiic0 at pci0 dev 31 function 3 "Intel 82801DB SMBus" rev 0x01: irq 11
iic0 at ichiic0
spdmem0 at iic0 addr 0x51: 256MB DDR SDRAM non-parity PC2700CL2.5
auich0 at pci0 dev 31 function 5 "Intel 82801DB AC97" rev 0x01: irq 11, ICH4
AC97
auich_attach: lists 0xd955b000 0xd955b100 0xd955b200
ac97: codec id 0x41445374 (Analog Devices AD1981B)
ac97: codec features headphone, 20 bit DAC, No 3D Stereo
audio0 at auich0
"Intel 82801DB Modem" rev 0x01 at pci0 dev 31 function 6 not configured
usb1 at uhci0: USB revision 1.0
uhub1 at usb1 "Intel UHCI root hub" rev 1.00/1.00 addr 1
usb2 at uhci1: USB revision 1.0
uhub2 at usb2 "Intel UHCI root hub" rev 1.00/1.00 addr 1
usb3 at uhci2: USB revision 1.0
uhub3 at usb3 "Intel UHCI root hub" rev 1.00/1.00 addr 1
isa0 at ichpcib0
isadma0 at isa0
pckbc0 at isa0 port 0x60/5
pckbd0 at pckbc0 (kbd slot)
pckbc0: using irq 1 for kbd slot
wskbd0 at pckbd0: console keyboard, using wsdisplay0
pms0 at pckbc0 (aux slot)
pckbc0: using irq 12 for aux slot
wsmouse0 at pms0 mux 0
pcppi0 at isa0 port 0x61
midi0 at pcppi0: <PC speaker>
spkr0 at pcppi0
aps0 at isa0 port 0x1600/31
npx0 at isa0 port 0xf0/16: reported by CPUID; using exception 16
biomask effd netmask effd ttymask ffff
mtrr: Pentium Pro MTRR support
vscsi0 at root
scsibus0 at vscsi0: 256 targets
softraid0 at root
root on wd0a swap on wd0b dump on wd0b
auich0: ac97 link rate calibration took 83321 us sts=7<dch,celv,lvbci> civ=0
auich0: after calibration and reset sts=1<dch> civ=0
auich0: measured ac97 link rate at 48007 Hz, will use 48000 Hz
auich_trigger_output(d955c000, d956a600, 11776, 0xd034a5b4, 0xd1364600,
0xd13646ec) sts=1<dch>
auich_trigger_pipe: qptr=0
auich_trigger_input(d956c000, d957a600, 11776, 0xd034a740, 0xd1364600,
0xd1364704) sts=1<dch>
auich_trigger_pipe: qptr=0
auich0: halt_input
auich0: halt_output
