On Sat, Jan 29, 2011 at 12:45:25PM +0100, Matthieu Herrb wrote:
> Hi,
> 
> More last minute X patches...
> 
> mpf@ reported in PR6517 a problem with his 965GM chipset. 
> 
> He did some debugging and found that a patch to the kernel i915 drm
> driver from one of the  X.Org maintaines (Chris Wilson) fixes his
> issues. I don't understand the patch (the X.Org bug report is about
> i855 cache coherency problems, not about 965GM) but since it helps
> both mpf and mcbride@ machines, I would like to see this committed. 
> 
> But wider testing is needed. Please apply the patch below to any
> machine you have running X with an intel chipset. Report success or
> failure to me please, with a dmesg and /var/log/Xorg.0.log. 
> 
> Thanks in advance.
> 
> Original bug report:
> https://bugs.freedesktop.org/show_bug.cgi?id=27187
> and patch :
> https://bugs.freedesktop.org//attachment.cgi?id=41531
> 
> Index: i915_drv.c
> ===================================================================
> RCS file: /cvs/OpenBSD/src/sys/dev/pci/drm/i915_drv.c,v
> retrieving revision 1.101
> diff -u -r1.101 i915_drv.c
> --- i915_drv.c        21 Sep 2010 23:05:41 -0000      1.101
> +++ i915_drv.c        29 Jan 2011 08:32:29 -0000
> @@ -995,16 +995,17 @@
>               bus_space_write_4(dev_priv->ifp.i9xx.bst,
>                   dev_priv->ifp.i9xx.bsh, 0, 1);
>       } else {
> -             /*
> -              * I8XX don't have a flush page mechanism, but do have the
> -              * cache. Do it the bruteforce way. we write 1024 byes into
> -              * the cache, then clflush them out so they'll kick the stuff
> -              * we care about out of the chipset cache.
> -              */
> -             if (dev_priv->ifp.i8xx.kva != NULL) {
> -                     memset(dev_priv->ifp.i8xx.kva, 0, 1024);
> -                     agp_flush_cache_range((vaddr_t)dev_priv->ifp.i8xx.kva,
> -                         1024);
> +             int i;
> +
> +             wbinvd();

That is a very large hammer.  How often is this code called?

> +
> +#define I830_HIC     0x70
> +
> +             I915_WRITE(I830_HIC, (I915_READ(I830_HIC) | (1<<31)));
> +             for (i = 1000; i; i--) {
                ^^^^^^^^^^^^^^^^^^^^^^
really?

> +                     if (!(I915_READ(I830_HIC) & (1<<31)))
> +                             break;
> +                     delay(100);
>               }
>       }
>  }
> 
> -- 
> Matthieu Herrb

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