Allow the PHY location to be adjusted instead of it being hardcoded
at 1 only. Add sanity checking for PHY location to the write register
function.
No change for currently supported chips.
OK?
Index: if_bge.c
===================================================================
RCS file: /home/cvs/src/sys/dev/pci/if_bge.c,v
retrieving revision 1.309
diff -u -p -r1.309 if_bge.c
--- if_bge.c 28 Jun 2012 11:52:15 -0000 1.309
+++ if_bge.c 2 Jul 2012 11:44:21 -0000
@@ -595,7 +595,7 @@ bge_miibus_readreg(struct device *dev, i
* trying to figure out which chips revisions should be
* special-cased.
*/
- if (phy != 1)
+ if (phy != sc->bge_phy_addr)
return (0);
/* Reading with autopolling on may trigger PCI errors */
@@ -645,6 +645,9 @@ bge_miibus_writereg(struct device *dev,
u_int32_t autopoll;
int i;
+ if (phy != sc->bge_phy_addr)
+ return;
+
/* Reading with autopolling on may trigger PCI errors */
autopoll = CSR_READ_4(sc, BGE_MI_MODE);
if (autopoll & BGE_MIMODE_AUTOPOLL) {
@@ -1918,6 +1921,10 @@ bge_attach(struct device *parent, struct
sizeof(name)) > 0 && strcmp(name, "network") == 0)
sc->bge_flags |= BGE_NO_EEPROM;
#endif
+
+ /* Set default PHY address. */
+ sc->bge_phy_addr = 1;
+
if (BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5700 ||
BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5701 ||
BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5703 ||
Index: if_bgereg.h
===================================================================
RCS file: /home/cvs/src/sys/dev/pci/if_bgereg.h,v
retrieving revision 1.104
diff -u -p -r1.104 if_bgereg.h
--- if_bgereg.h 15 Feb 2011 19:49:47 -0000 1.104
+++ if_bgereg.h 2 Jul 2012 11:38:43 -0000
@@ -2641,6 +2641,7 @@ struct bge_softc {
#define BGE_STS_CLRBIT(sc, x) ((sc)->bge_sts &= ~(x))
int bge_flowflags;
int bge_txcnt;
+ int bge_phy_addr;
struct timeout bge_timeout;
struct timeout bge_rxtimeout;
u_int32_t bge_rx_discards;
--
This message has been scanned for viruses and
dangerous content by MailScanner, and is
believed to be clean.
