Some test reports with this would be great. In particular for radeon. drm/i915: Fix mutex->owner inspection race under DEBUG_MUTEXES drm/i915: Force the CS stall for invalidate flushes drm/i915: Invalidate media caches on gen7 drm/radeon: properly filter DP1.2 4k modes on non-DP1.2 hw drm/radeon: check the right ring in radeon_evict_flags() drm/i915: Unlock panel even when LVDS is disabled drm_calc_vbltimestamp_from_scanoutpos with 3.18.0-rc6 drm/radeon: add missing crtc unlock when setting up the MC drm/radeon: add connector quirk for fujitsu board drm/i915: Wait for vblank before enabling the TV encoder drm/i915: Remove bogus __init annotation from DMI callbacks drm/i915: read HEAD register back in init_ring_common() to enforce ordering drm/radeon: load the lm63 driver for an lm64 thermal chip. drm/radeon: avoid leaking edid data drm/radeon: set default bl level to something reasonable drm/radeon: stop poisoning the GART TLB
diff --git sys/dev/pci/drm/i915/i915_gem.c sys/dev/pci/drm/i915/i915_gem.c index d42b923..95e351f 100644 --- sys/dev/pci/drm/i915/i915_gem.c +++ sys/dev/pci/drm/i915/i915_gem.c @@ -4596,7 +4596,7 @@ static bool mutex_is_locked_by(struct mutex *mutex, struct task_struct *task) if (!mutex_is_locked(mutex)) return false; -#if defined(CONFIG_SMP) || defined(CONFIG_DEBUG_MUTEXES) +#if defined(CONFIG_SMP) && !defined(CONFIG_DEBUG_MUTEXES) return mutex->owner == task; #else /* Since UP may be pre-empted, we cannot assume that we own the lock */ diff --git sys/dev/pci/drm/i915/i915_reg.h sys/dev/pci/drm/i915/i915_reg.h index cf447cf..b4b25bc 100644 --- sys/dev/pci/drm/i915/i915_reg.h +++ sys/dev/pci/drm/i915/i915_reg.h @@ -305,6 +305,7 @@ #define PIPE_CONTROL_GLOBAL_GTT_IVB (1<<24) /* gen7+ */ #define PIPE_CONTROL_CS_STALL (1<<20) #define PIPE_CONTROL_TLB_INVALIDATE (1<<18) +#define PIPE_CONTROL_MEDIA_STATE_CLEAR (1<<16) #define PIPE_CONTROL_QW_WRITE (1<<14) #define PIPE_CONTROL_DEPTH_STALL (1<<13) #define PIPE_CONTROL_WRITE_FLUSH (1<<12) diff --git sys/dev/pci/drm/i915/intel_bios.c sys/dev/pci/drm/i915/intel_bios.c index 88406ad..47a0285 100644 --- sys/dev/pci/drm/i915/intel_bios.c +++ sys/dev/pci/drm/i915/intel_bios.c @@ -660,7 +660,7 @@ init_vbt_defaults(struct drm_i915_private *dev_priv) DRM_DEBUG_KMS("Set default to SSC at %dMHz\n", dev_priv->lvds_ssc_freq); } -static int __init intel_no_opregion_vbt_callback(const struct dmi_system_id *id) +static int intel_no_opregion_vbt_callback(const struct dmi_system_id *id) { DRM_DEBUG_KMS("Falling back to manually reading VBT from " "VBIOS ROM for %s\n", diff --git sys/dev/pci/drm/i915/intel_crt.c sys/dev/pci/drm/i915/intel_crt.c index adbbadf..9e8f01d 100644 --- sys/dev/pci/drm/i915/intel_crt.c +++ sys/dev/pci/drm/i915/intel_crt.c @@ -714,7 +714,7 @@ static const struct drm_encoder_funcs intel_crt_enc_funcs = { .destroy = intel_encoder_destroy, }; -static int __init intel_no_crt_dmi_callback(const struct dmi_system_id *id) +static int intel_no_crt_dmi_callback(const struct dmi_system_id *id) { printf("Skipping CRT initialization for %s\n", id->ident); return 1; diff --git sys/dev/pci/drm/i915/intel_lvds.c sys/dev/pci/drm/i915/intel_lvds.c index 6c18e63..5b00c6f 100644 --- sys/dev/pci/drm/i915/intel_lvds.c +++ sys/dev/pci/drm/i915/intel_lvds.c @@ -636,7 +636,7 @@ static const struct drm_encoder_funcs intel_lvds_enc_funcs = { .destroy = intel_encoder_destroy, }; -static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id) +static int intel_no_lvds_dmi_callback(const struct dmi_system_id *id) { printf("Skipping LVDS initialization for %s\n", id->ident); return 1; @@ -984,6 +984,17 @@ bool intel_lvds_init(struct drm_device *dev) int pipe; u8 pin; + /* + * Unlock registers and just leave them unlocked. Do this before + * checking quirk lists to avoid bogus WARNINGs. + */ + if (HAS_PCH_SPLIT(dev)) { + I915_WRITE(PCH_PP_CONTROL, + I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS); + } else { + I915_WRITE(PP_CONTROL, + I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS); + } if (!intel_lvds_supported(dev)) return false; @@ -1154,17 +1165,6 @@ bool intel_lvds_init(struct drm_device *dev) goto failed; out: - /* - * Unlock registers and just - * leave them unlocked - */ - if (HAS_PCH_SPLIT(dev)) { - I915_WRITE(PCH_PP_CONTROL, - I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS); - } else { - I915_WRITE(PP_CONTROL, - I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS); - } #ifdef notyet lvds_connector->lid_notifier.notifier_call = intel_lid_notify; if (acpi_lid_notifier_register(&lvds_connector->lid_notifier)) { diff --git sys/dev/pci/drm/i915/intel_ringbuffer.c sys/dev/pci/drm/i915/intel_ringbuffer.c index 471286f..133a896 100644 --- sys/dev/pci/drm/i915/intel_ringbuffer.c +++ sys/dev/pci/drm/i915/intel_ringbuffer.c @@ -316,12 +316,15 @@ gen7_render_ring_flush(struct intel_ring_buffer *ring, flags |= PIPE_CONTROL_VF_CACHE_INVALIDATE; flags |= PIPE_CONTROL_CONST_CACHE_INVALIDATE; flags |= PIPE_CONTROL_STATE_CACHE_INVALIDATE; + flags |= PIPE_CONTROL_MEDIA_STATE_CLEAR; /* * TLB invalidate requires a post-sync write. */ flags |= PIPE_CONTROL_QW_WRITE; flags |= PIPE_CONTROL_GLOBAL_GTT_IVB; + flags |= PIPE_CONTROL_STALL_AT_SCOREBOARD; + /* Workaround: we must issue a pipe_control with CS-stall bit * set before a pipe_control command that has the state cache * invalidate bit set. */ @@ -399,6 +402,9 @@ static int init_ring_common(struct intel_ring_buffer *ring) } } + /* Enforce ordering by reading HEAD register back */ + I915_READ_HEAD(ring); + /* Initialize the ring. This must happen _after_ we've cleared the ring * registers with the above sequence (the readback of the HEAD registers * also enforces ordering), otherwise the hw might lose the new ring diff --git sys/dev/pci/drm/i915/intel_tv.c sys/dev/pci/drm/i915/intel_tv.c index 8106aac..a931056 100644 --- sys/dev/pci/drm/i915/intel_tv.c +++ sys/dev/pci/drm/i915/intel_tv.c @@ -857,6 +857,10 @@ intel_enable_tv(struct intel_encoder *encoder) struct drm_device *dev = encoder->base.dev; struct drm_i915_private *dev_priv = dev->dev_private; + /* Prevents vblank waits from timing out in intel_tv_detect_type() */ + intel_wait_for_vblank(encoder->base.dev, + to_intel_crtc(encoder->base.crtc)->pipe); + I915_WRITE(TV_CTL, I915_READ(TV_CTL) | TV_ENC_ENABLE); } diff --git sys/dev/pci/drm/radeon/atombios_dp.c sys/dev/pci/drm/radeon/atombios_dp.c index 409d740..646742a 100644 --- sys/dev/pci/drm/radeon/atombios_dp.c +++ sys/dev/pci/drm/radeon/atombios_dp.c @@ -577,6 +577,10 @@ int radeon_dp_mode_valid_helper(struct drm_connector *connector, struct radeon_connector_atom_dig *dig_connector; int dp_clock; + if ((mode->clock > 340000) && + (!radeon_connector_is_dp12_capable(connector))) + return MODE_CLOCK_HIGH; + if (!radeon_connector->con_priv) return MODE_CLOCK_HIGH; dig_connector = radeon_connector->con_priv; diff --git sys/dev/pci/drm/radeon/atombios_encoders.c sys/dev/pci/drm/radeon/atombios_encoders.c index 02789d4..a632afa 100644 --- sys/dev/pci/drm/radeon/atombios_encoders.c +++ sys/dev/pci/drm/radeon/atombios_encoders.c @@ -189,7 +189,6 @@ void radeon_atom_backlight_init(struct radeon_encoder *radeon_encoder, struct backlight_properties props; struct radeon_backlight_privdata *pdata; struct radeon_encoder_atom_dig *dig; - u8 backlight_level; char bl_name[16]; if (!radeon_encoder->enc_priv) @@ -221,12 +220,17 @@ void radeon_atom_backlight_init(struct radeon_encoder *radeon_encoder, pdata->encoder = radeon_encoder; - backlight_level = radeon_atom_get_backlight_level_from_reg(rdev); - dig = radeon_encoder->enc_priv; dig->bl_dev = bd; bd->props.brightness = radeon_atom_backlight_get_brightness(bd); + /* Set a reasonable default here if the level is 0 otherwise + * fbdev will attempt to turn the backlight on after console + * unblanking and it will try and restore 0 which turns the backlight + * off again. + */ + if (bd->props.brightness == 0) + bd->props.brightness = RADEON_MAX_BL_LEVEL; bd->props.power = FB_BLANK_UNBLANK; backlight_update_status(bd); diff --git sys/dev/pci/drm/radeon/evergreen.c sys/dev/pci/drm/radeon/evergreen.c index e4dedc6..92221e6 100644 --- sys/dev/pci/drm/radeon/evergreen.c +++ sys/dev/pci/drm/radeon/evergreen.c @@ -1390,6 +1390,7 @@ void evergreen_mc_stop(struct radeon_device *rdev, struct evergreen_mc_save *sav WREG32(EVERGREEN_CRTC_UPDATE_LOCK + crtc_offsets[i], 1); tmp |= EVERGREEN_CRTC_BLANK_DATA_EN; WREG32(EVERGREEN_CRTC_BLANK_CONTROL + crtc_offsets[i], tmp); + WREG32(EVERGREEN_CRTC_UPDATE_LOCK + crtc_offsets[i], 0); } } else { tmp = RREG32(EVERGREEN_CRTC_CONTROL + crtc_offsets[i]); diff --git sys/dev/pci/drm/radeon/radeon_atombios.c sys/dev/pci/drm/radeon/radeon_atombios.c index 613c307..a1f72fc 100644 --- sys/dev/pci/drm/radeon/radeon_atombios.c +++ sys/dev/pci/drm/radeon/radeon_atombios.c @@ -472,6 +472,13 @@ static bool radeon_atom_apply_quirks(struct drm_device *dev, } } + /* Fujitsu D3003-S2 board lists DVI-I as DVI-I and VGA */ + if ((dev->pdev->device == 0x9805) && + (dev->pdev->subsystem_vendor == 0x1734) && + (dev->pdev->subsystem_device == 0x11bd)) { + if (*connector_type == DRM_MODE_CONNECTOR_VGA) + return false; + } return true; } @@ -1917,7 +1924,7 @@ static const char *thermal_controller_names[] = { "adm1032", "adm1030", "max6649", - "lm64", + "lm63", /* lm64 */ "f75375", "asc7xxx", }; @@ -1928,7 +1935,7 @@ static const char *pp_lib_thermal_controller_names[] = { "adm1032", "adm1030", "max6649", - "lm64", + "lm63", /* lm64 */ "f75375", "RV6xx", "RV770", diff --git sys/dev/pci/drm/radeon/radeon_display.c sys/dev/pci/drm/radeon/radeon_display.c index 17b2f9b..62245ed 100644 --- sys/dev/pci/drm/radeon/radeon_display.c +++ sys/dev/pci/drm/radeon/radeon_display.c @@ -702,6 +702,10 @@ int radeon_ddc_get_modes(struct radeon_connector *radeon_connector) struct radeon_device *rdev = dev->dev_private; int ret = 0; + /* don't leak the edid if we already fetched it in detect() */ + if (radeon_connector->edid) + goto got_edid; + /* on hw with routers, select right port */ if (radeon_connector->router.ddc_valid) radeon_router_select_ddc_port(radeon_connector); @@ -741,6 +745,7 @@ int radeon_ddc_get_modes(struct radeon_connector *radeon_connector) radeon_connector->edid = radeon_bios_get_hardcoded_edid(rdev); } if (radeon_connector->edid) { +got_edid: drm_mode_connector_update_edid_property(&radeon_connector->base, radeon_connector->edid); ret = drm_add_edid_modes(&radeon_connector->base, radeon_connector->edid); drm_edid_to_eld(&radeon_connector->base, radeon_connector->edid); diff --git sys/dev/pci/drm/radeon/radeon_kms.c sys/dev/pci/drm/radeon/radeon_kms.c index a7aabbd..546390b 100644 --- sys/dev/pci/drm/radeon/radeon_kms.c +++ sys/dev/pci/drm/radeon/radeon_kms.c @@ -1300,6 +1300,8 @@ int radeon_get_vblank_timestamp_kms(struct drm_device *dev, int crtc, /* Get associated drm_crtc: */ drmcrtc = &rdev->mode_info.crtcs[crtc]->base; + if (!drmcrtc) + return -EINVAL; /* Helper routine in DRM core does all the work: */ return drm_calc_vbltimestamp_from_scanoutpos(dev, crtc, max_error, diff --git sys/dev/pci/drm/radeon/radeon_ttm.c sys/dev/pci/drm/radeon/radeon_ttm.c index 3fd4f3e..840406f 100644 --- sys/dev/pci/drm/radeon/radeon_ttm.c +++ sys/dev/pci/drm/radeon/radeon_ttm.c @@ -224,7 +224,7 @@ radeon_evict_flags(struct ttm_buffer_object *bo, rbo = container_of(bo, struct radeon_bo, tbo); switch (bo->mem.mem_type) { case TTM_PL_VRAM: - if (rbo->rdev->ring[RADEON_RING_TYPE_GFX_INDEX].ready == false) + if (rbo->rdev->ring[radeon_copy_ring_index(rbo->rdev)].ready == false) radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_CPU); else radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_GTT); diff --git sys/dev/pci/drm/radeon/rs600.c sys/dev/pci/drm/radeon/rs600.c index de23e52..7ed205d 100644 --- sys/dev/pci/drm/radeon/rs600.c +++ sys/dev/pci/drm/radeon/rs600.c @@ -587,8 +587,10 @@ int rs600_gart_set_page(struct radeon_device *rdev, int i, uint64_t addr) return -EINVAL; } addr = addr & 0xFFFFFFFFFFFFF000ULL; - addr |= R600_PTE_VALID | R600_PTE_SYSTEM | R600_PTE_SNOOPED; - addr |= R600_PTE_READABLE | R600_PTE_WRITEABLE; + if (addr != rdev->dummy_page.addr) + addr |= R600_PTE_VALID | R600_PTE_READABLE | + R600_PTE_WRITEABLE; + addr |= R600_PTE_SYSTEM | R600_PTE_SNOOPED; ptr += i; *ptr = addr; return 0;