> This chunk doesn't make sense to me. The code is supposed to write a
> magic value into SRAM, not into a register.
If I understand if_bgereg.h correctly, access to the SRAM can be
performed either through a simple indirect access (write address to the
index register, read from or write to the data register), or through a
fixed 32KB window in the pci address space, and the latter is not
available on older models.
Thus it makes sense to use write_op as determined from the board type
earlier, rather than always use writemem_ind.
Also, the following diff to if_bgereg.h makes sure that the window is
used as a 32KB window, not a 64KB one.
Index: if_bgereg.h
===================================================================
RCS file: /OpenBSD/src/sys/dev/pci/if_bgereg.h,v
retrieving revision 1.128
diff -u -p -r1.128 if_bgereg.h
--- if_bgereg.h 19 Oct 2015 05:31:25 -0000 1.128
+++ if_bgereg.h 1 Nov 2015 10:01:54 -0000
@@ -47,7 +47,7 @@
*
* The NIC's memory can be accessed by the host in one of 3 ways:
*
- * 1) Indirect register access. The MEMWIN_BASEADDR and MEMWIN_DATA
+ * 1) Indirect register access. The REG_BASEADDR and REG_DATA
* registers in PCI config space can be used to read any 32-bit
* address within the NIC's memory.
*
@@ -2272,15 +2272,15 @@
#define BGE_MEMWIN_READ(pc, tag, x, val)
\
do { \
pci_conf_write(pc, tag, BGE_PCI_MEMWIN_BASEADDR, \
- (0xFFFF0000 & x)); \
- val = CSR_READ_4(sc, BGE_MEMWIN_START + (x & 0xFFFF)); \
+ (0xFFFF8000 & x)); \
+ val = CSR_READ_4(sc, BGE_MEMWIN_START + (x & 0x7FFF)); \
} while(0)
#define BGE_MEMWIN_WRITE(pc, tag, x, val)
\
do { \
pci_conf_write(pc, tag, BGE_PCI_MEMWIN_BASEADDR, \
- (0xFFFF0000 & x)); \
- CSR_WRITE_4(sc, BGE_MEMWIN_START + (x & 0xFFFF), val); \
+ (0xFFFF8000 & x)); \
+ CSR_WRITE_4(sc, BGE_MEMWIN_START + (x & 0x7FFF), val); \
} while(0)
/*
