Mark Kettenis wrote:
> It is pretty clear that the DMA engine on the Davicom dc(4) hardware
> is broken and will read beyond the end of the buffer that we pass it.
> This is bad news for hardware that uses an IOMMU, as it will detect
> the DMA overrun and (at least on sparc64) signal an unrecoverable
> error.
> Index: arch/sparc64/dev/iommu.c
> ===================================================================
> RCS file: /cvs/src/sys/arch/sparc64/dev/iommu.c,v
> retrieving revision 1.72
> diff -u -p -r1.72 iommu.c
> --- arch/sparc64/dev/iommu.c 9 Jan 2015 14:23:25 -0000 1.72
> +++ arch/sparc64/dev/iommu.c 2 Apr 2016 15:42:17 -0000
> @@ -195,6 +195,13 @@ iommu_init(char *name, struct iommu_stat
> pmap_update(pmap_kernel());
> memset(is->is_tsb, 0, size);
>
> + TAILQ_INIT(&mlist);
> + if (uvm_pglistalloc(PAGE_SIZE, (paddr_t)0, (paddr_t)-1,
> + (paddr_t)PAGE_SIZE, (paddr_t)0, &mlist, 1, UVM_PLA_NOWAIT) != 0)
> + panic("iommu_init: no memory");
> + m = TAILQ_FIRST(&mlist);
> + is->is_scratch = VM_PAGE_TO_PHYS(m);
You want to zero this page I think? I don't like the idea that the device
could be reading old data it should not be (even if we don't think it's
actually doing anything).
