> Hmm, doesn' Loongsoon actually have a NX bit? Perhaps in later > generations? In any case I'd keep them separate. Keeps the number of > variations between platfforms down a bit.
I doubt a mips cpu will show up with a X or NX bit. MIPS TLB are not really designed to handle such fault conditions, and all previous TLB extensions have failed to hint any vendor might go that way (all extensions are for faster translation of fat pages). These processors are generally used in embedded, so I wouldn't wait around for a security feature to be added in a new generation. I'm unsure about the padding. It seems nice to keep different perm objects in different pages, but since the default pagesize here is 16K, the needless policy starts to cost a bit much.
