On Thu, Mar 23, 2017 at 04:20:07PM +0100, Simon Mages wrote: > Hi, > > on some machines i saw some unknown enhanced capabilities. After > looking into it i saw that > on some intel chipsets there actually is a capability with id 0x0. > This capability contains some > registers of the Advanced Error Reporting Capability but not all of > them. I guess intel choose > 0x0 instead of 0x1 because there implementation contains not all of > the minimal Advanced > Error Reporting registers. > > Anyway, i think it makes sense to print the enhanced capability id, > even if it is not in the list. > This way one does not have to look at the hexdump of pcidump -xxx to > figure out which > capability id the unknown capability has. >
no objections. kettenis? > Index: usr.sbin/pcidump/pcidump.c > =================================================================== > --- pcidump.c 16 Mar 2017 22:05:46 -0000 1.42 > +++ pcidump.c 23 Mar 2017 15:12:07 -0000 > @@ -392,6 +392,7 @@ void > dump_pcie_enhanced_caplist(int bus, int dev, int func) > { > u_int32_t reg; > + u_int32_t capidx; > u_int16_t ptr; > u_int16_t ecap; > > @@ -407,10 +408,12 @@ dump_pcie_enhanced_caplist(int bus, int > > ecap = PCI_PCIE_ECAP_ID(reg); > if (ecap >= nitems(pci_enhanced_capnames)) > - ecap = 0; > + capidx = 0; > + else > + capidx = ecap; > > printf("\t0x%04x: Enhanced Capability 0x%02x: ", ptr, ecap); > - printf("%s\n", pci_enhanced_capnames[ecap]); > + printf("%s\n", pci_enhanced_capnames[capidx]); > > ptr = PCI_PCIE_ECAP_NEXT(reg); > > > According to Rev. 3.0 of the PCIe spec, the last two bits are reserved > for future use. I do not > have access to the spec > Rev. 3.0. > > Index: dev/pci/pcireg.h > =================================================================== > --- dev/pci/pcireg.h 22 Mar 2017 07:21:39 -0000 1.52 > +++ dev/pci/pcireg.h 23 Mar 2017 13:36:09 -0000 > @@ -606,7 +606,7 @@ typedef u_int8_t pci_revision_t; > #define PCI_PCIE_ECAP 0x100 > #define PCI_PCIE_ECAP_ID(x) (((x) & 0x0000ffff)) > #define PCI_PCIE_ECAP_VER(x) (((x) >> 16) & 0x0f) > -#define PCI_PCIE_ECAP_NEXT(x) ((x) >> 20) > +#define PCI_PCIE_ECAP_NEXT(x) (((x) >> 20) & 0xffc) > #define PCI_PCIE_ECAP_LAST 0x0 > > /* >