On Sun, Sep 03, 2017 at 07:56:30AM +0300, Artturi Alm wrote:
> On Mon, Jul 03, 2017 at 06:14:06AM +0300, Artturi Alm wrote:
> > Hi,
> >
> > just the bug fix, so this diff leaves the unused relics around and so,
> > but better than current/nothing, and hopefully small enough to get looked
> > at.
> >
> > -Artturi
> >
>
> ping?
> a4x bus_space is supposed to be identical to armv7 bus_space w/ offset << 2.
>
> -Artturi
>
pong?
just in case the minimal diff was lacking good enough description, i'll
try again, hoping the desire for md correctness will prevail even for an
arch like armv7, atleast for obvious(?) things like this.
for those who don't know what a4x bus_space is for:
/*
* There are simple bus space functions for IO registers mapped at
* 32-bit aligned positions. offset is multiplied by 4.
*/
i guess it should read "These are ..", that was from armv7_a4x_io.S,
another more broken descr. of it can be found from armv7_a4x_space.c:
/*
* Bus space tag for 8/16-bit devices on 32-bit bus.
* all registers are located at the address of multiple of 4.
*/
== wrong, as it does support 32-bit reads and writes, but not in multiples.
anyway, it's purpose remains the same, to do offset << 2 before bus op.
So, there's nothing suggesting a4x shouldn't have the barriers added by
diff below, to really make it armv7_bus_space+off*4 i believe it was/is
meant to be, and nothing should use the generic/generic_armv4 bs.
current might work now, will anyone remember this if MULTIPROCESSOR would
ever appear, and have weird problems w/console? idk. i'll just leave this
here:)
-Artturi
diff --git a/sys/arch/arm/arm/bus_space_asm_generic.S
b/sys/arch/arm/arm/bus_space_asm_generic.S
deleted file mode 100644
index 97b71a5cecc..00000000000
--- a/sys/arch/arm/arm/bus_space_asm_generic.S
+++ /dev/null
@@ -1,336 +0,0 @@
-/* $OpenBSD: bus_space_asm_generic.S,v 1.5 2017/01/06 00:06:02 jsg Exp $
*/
-/* $NetBSD: bus_space_asm_generic.S,v 1.3 2003/03/27 19:46:14 mycroft Exp
$ */
-
-/*
- * Copyright (c) 1997 Causality Limited.
- * Copyright (c) 1997 Mark Brinicombe.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by Mark Brinicombe
- * for the NetBSD Project.
- * 4. The name of the company nor the name of the author may be used to
- * endorse or promote products derived from this software without specific
- * prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
- * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <arm/asm.h>
-#include <arm/cpuconf.h>
-
-/*
- * Generic bus_space functions.
- */
-
-/*
- * read single
- */
-
-ENTRY(generic_bs_r_1)
- ldrb r0, [r1, r2]
- mov pc, lr
-
-ENTRY(generic_armv4_bs_r_2)
- ldrh r0, [r1, r2]
- mov pc, lr
-
-ENTRY(generic_bs_r_4)
- ldr r0, [r1, r2]
- mov pc, lr
-
-/*
- * write single
- */
-
-ENTRY(generic_bs_w_1)
- strb r3, [r1, r2]
- mov pc, lr
-
-ENTRY(generic_armv4_bs_w_2)
- strh r3, [r1, r2]
- mov pc, lr
-
-ENTRY(generic_bs_w_4)
- str r3, [r1, r2]
- mov pc, lr
-
-/*
- * read multiple
- */
-
-ENTRY(generic_bs_rm_1)
- add r0, r1, r2
- mov r1, r3
- ldr r2, [sp, #0]
- teq r2, #0
- moveq pc, lr
-
-1: ldrb r3, [r0]
- strb r3, [r1], #1
- subs r2, r2, #1
- bne 1b
-
- mov pc, lr
-
-ENTRY(generic_armv4_bs_rm_2)
- add r0, r1, r2
- mov r1, r3
- ldr r2, [sp, #0]
- teq r2, #0
- moveq pc, lr
-
-1: ldrh r3, [r0]
- strh r3, [r1], #2
- subs r2, r2, #1
- bne 1b
-
- mov pc, lr
-
-ENTRY(generic_bs_rm_4)
- add r0, r1, r2
- mov r1, r3
- ldr r2, [sp, #0]
- teq r2, #0
- moveq pc, lr
-
-1: ldr r3, [r0]
- str r3, [r1], #4
- subs r2, r2, #1
- bne 1b
-
- mov pc, lr
-
-/*
- * write multiple
- */
-
-ENTRY(generic_bs_wm_1)
- add r0, r1, r2
- mov r1, r3
- ldr r2, [sp, #0]
- teq r2, #0
- moveq pc, lr
-
-1: ldrb r3, [r1], #1
- strb r3, [r0]
- subs r2, r2, #1
- bne 1b
-
- mov pc, lr
-
-ENTRY(generic_armv4_bs_wm_2)
- add r0, r1, r2
- mov r1, r3
- ldr r2, [sp, #0]
- teq r2, #0
- moveq pc, lr
-
-1: ldrh r3, [r1], #2
- strh r3, [r0]
- subs r2, r2, #1
- bne 1b
-
- mov pc, lr
-
-ENTRY(generic_bs_wm_4)
- add r0, r1, r2
- mov r1, r3
- ldr r2, [sp, #0]
- teq r2, #0
- moveq pc, lr
-
-1: ldr r3, [r1], #4
- str r3, [r0]
- subs r2, r2, #1
- bne 1b
-
- mov pc, lr
-
-/*
- * read region
- */
-
-ENTRY(generic_bs_rr_1)
- add r0, r1, r2
- mov r1, r3
- ldr r2, [sp, #0]
- teq r2, #0
- moveq pc, lr
-
-1: ldrb r3, [r0], #1
- strb r3, [r1], #1
- subs r2, r2, #1
- bne 1b
-
- mov pc, lr
-
-ENTRY(generic_armv4_bs_rr_2)
- add r0, r1, r2
- mov r1, r3
- ldr r2, [sp, #0]
- teq r2, #0
- moveq pc, lr
-
-1: ldrh r3, [r0], #2
- strh r3, [r1], #2
- subs r2, r2, #1
- bne 1b
-
- mov pc, lr
-
-ENTRY(generic_bs_rr_4)
- add r0, r1, r2
- mov r1, r3
- ldr r2, [sp, #0]
- teq r2, #0
- moveq pc, lr
-
-1: ldr r3, [r0], #4
- str r3, [r1], #4
- subs r2, r2, #1
- bne 1b
-
- mov pc, lr
-
-/*
- * write region.
- */
-
-ENTRY(generic_bs_wr_1)
- add r0, r1, r2
- mov r1, r3
- ldr r2, [sp, #0]
- teq r2, #0
- moveq pc, lr
-
-1: ldrb r3, [r1], #1
- strb r3, [r0], #1
- subs r2, r2, #1
- bne 1b
-
- mov pc, lr
-
-ENTRY(generic_armv4_bs_wr_2)
- add r0, r1, r2
- mov r1, r3
- ldr r2, [sp, #0]
- teq r2, #0
- moveq pc, lr
-
-1: ldrh r3, [r1], #2
- strh r3, [r0], #2
- subs r2, r2, #1
- bne 1b
-
- mov pc, lr
-
-ENTRY(generic_bs_wr_4)
- add r0, r1, r2
- mov r1, r3
- ldr r2, [sp, #0]
- teq r2, #0
- moveq pc, lr
-
-1: ldr r3, [r1], #4
- str r3, [r0], #4
- subs r2, r2, #1
- bne 1b
-
- mov pc, lr
-
-/*
- * set region
- */
-
-ENTRY(generic_bs_sr_1)
- add r0, r1, r2
- mov r1, r3
- ldr r2, [sp, #0]
- teq r2, #0
- moveq pc, lr
-
-1: strb r1, [r0], #1
- subs r2, r2, #1
- bne 1b
-
- mov pc, lr
-
-ENTRY(generic_armv4_bs_sr_2)
- add r0, r1, r2
- mov r1, r3
- ldr r2, [sp, #0]
- teq r2, #0
- moveq pc, lr
-
-1: strh r1, [r0], #2
- subs r2, r2, #1
- bne 1b
-
- mov pc, lr
-
-ENTRY(generic_bs_sr_4)
- add r0, r1, r2
- mov r1, r3
- ldr r2, [sp, #0]
- teq r2, #0
- moveq pc, lr
-
-1: str r1, [r0], #4
- subs r2, r2, #1
- bne 1b
-
- mov pc, lr
-
-/*
- * copy region
- */
-
-ENTRY(generic_armv4_bs_c_2)
- add r0, r1, r2
- ldr r2, [sp, #0]
- add r1, r2, r3
- ldr r2, [sp, #4]
- teq r2, #0
- moveq pc, lr
-
- cmp r0, r1
- blt 2f
-
-1: ldrh r3, [r0], #2
- strh r3, [r1], #2
- subs r2, r2, #1
- bne 1b
-
- mov pc, lr
-
-2: add r0, r0, r2, lsl #1
- add r1, r1, r2, lsl #1
- sub r0, r0, #2
- sub r1, r1, #2
-
-3: ldrh r3, [r0], #-2
- strh r3, [r1], #-2
- subs r2, r2, #1
- bne 3b
-
- mov pc, lr
diff --git a/sys/arch/arm/armv7/armv7_a4x_io.S
b/sys/arch/arm/armv7/armv7_a4x_io.S
index 3fa09faa4c2..5e9db421853 100644
--- a/sys/arch/arm/armv7/armv7_a4x_io.S
+++ b/sys/arch/arm/armv7/armv7_a4x_io.S
@@ -50,14 +50,17 @@
*/
ENTRY(a4x_bs_r_1)
+ dsb sy
ldr r0, [r1, r2, LSL #2]
mov pc, lr
ENTRY(a4x_bs_r_2)
+ dsb sy
ldr r0, [r1, r2, LSL #2]
mov pc, lr
ENTRY(a4x_bs_r_4)
+ dsb sy
ldr r0, [r1, r2, LSL #2]
mov pc, lr
@@ -67,14 +70,17 @@ ENTRY(a4x_bs_r_4)
ENTRY(a4x_bs_w_1)
str r3, [r1, r2, LSL #2]
+ dsb sy
mov pc, lr
ENTRY(a4x_bs_w_2)
str r3, [r1, r2, LSL #2]
+ dsb sy
mov pc, lr
ENTRY(a4x_bs_w_4)
str r3, [r1, r2, LSL #2]
+ dsb sy
mov pc, lr
/*
@@ -82,11 +88,11 @@ ENTRY(a4x_bs_w_4)
*/
ENTRY(a4x_bs_rm_1)
mov r2, r2, LSL #2
- b generic_bs_rm_1
+ b armv7_bs_rm_1
ENTRY(a4x_bs_rm_2)
mov r2, r2, LSL #2
- b generic_armv4_bs_rm_2
+ b armv7_bs_rm_2
@@ -95,8 +101,8 @@ ENTRY(a4x_bs_rm_2)
*/
ENTRY(a4x_bs_wm_1)
mov r2, r2, LSL #2
- b generic_bs_wm_1
+ b armv7_bs_wm_1
ENTRY(a4x_bs_wm_2)
mov r2, r2, LSL #2
- b generic_armv4_bs_wm_2
+ b armv7_bs_wm_2
diff --git a/sys/arch/arm/armv7/armv7_a4x_space.c
b/sys/arch/arm/armv7/armv7_a4x_space.c
index 845f7704d8d..b5204579326 100644
--- a/sys/arch/arm/armv7/armv7_a4x_space.c
+++ b/sys/arch/arm/armv7/armv7_a4x_space.c
@@ -49,8 +49,6 @@
/* Prototypes for all the bus_space structure functions */
bs_protos(armv7);
bs_protos(a4x);
-bs_protos(generic);
-bs_protos(generic_armv4);
bs_protos(bs_notimpl);
struct bus_space armv7_a4x_bs_tag = {
diff --git a/sys/arch/arm/armv7/armv7_space.c b/sys/arch/arm/armv7/armv7_space.c
index c7e9b686b8f..b48221803c7 100644
--- a/sys/arch/arm/armv7/armv7_space.c
+++ b/sys/arch/arm/armv7/armv7_space.c
@@ -84,7 +84,6 @@
/* Prototypes for all the bus_space structure functions */
bs_protos(armv7);
-bs_protos(generic);
bs_protos(bs_notimpl);
struct bus_space armv7_bs_tag = {
diff --git a/sys/arch/arm/conf/files.arm b/sys/arch/arm/conf/files.arm
index 9dae5a17689..713037c36a6 100644
--- a/sys/arch/arm/conf/files.arm
+++ b/sys/arch/arm/conf/files.arm
@@ -37,7 +37,6 @@ attach cpu at mainbus
# bus_space(9)
define bus_space_generic
-file arch/arm/arm/bus_space_asm_generic.S
file arch/arm/arm/bus_space_notimpl.S
file arch/arm/arm/arm_machdep.c
