On 2018/06/20 05:53, Leo Unglaub wrote:
> Hi,
> I applied your code on my AMD Ryzen 7 1700X. Below is the dmesg. I hope this
> helps, if you have any other AMD Ryzen related stuff that needs testing
> please let me know.
So there's no convenient "smt id" returned..
> > cpu0 at mainbus0: apid 0 (boot processor)
> > cpu0: eax 0x00000000 ebx 0x00000100 ecx 0x00000000
> > cpu0: smt 0, core 0, package 0
> > cpu1 at mainbus0: apid 1 (application processor)
> > cpu1: eax 0x00000001 ebx 0x00000100 ecx 0x00000000
> > cpu1: smt 0, core 1, package 0
> > cpu2 at mainbus0: apid 2 (application processor)
> > cpu2: eax 0x00000002 ebx 0x00000101 ecx 0x00000000
> > cpu2: smt 0, core 2, package 0
> > cpu3 at mainbus0: apid 3 (application processor)
> > cpu3: eax 0x00000003 ebx 0x00000101 ecx 0x00000000
> > cpu3: smt 0, core 3, package 0
> > cpu4 at mainbus0: apid 4 (application processor)
> > cpu4: eax 0x00000004 ebx 0x00000102 ecx 0x00000000
> > cpu4: smt 0, core 4, package 0
> > cpu5 at mainbus0: apid 5 (application processor)
> > cpu5: eax 0x00000005 ebx 0x00000102 ecx 0x00000000
> > cpu5: smt 0, core 5, package 0
> > cpu6 at mainbus0: apid 6 (application processor)
> > cpu6: eax 0x00000006 ebx 0x00000103 ecx 0x00000000
> > cpu6: smt 0, core 6, package 0
> > cpu7 at mainbus0: apid 7 (application processor)
> > cpu7: eax 0x00000007 ebx 0x00000103 ecx 0x00000000
> > cpu7: smt 0, core 7, package 0
> > cpu8 at mainbus0: apid 8 (application processor)
> > cpu8: eax 0x00000008 ebx 0x00000104 ecx 0x00000000
> > cpu8: smt 0, core 8, package 0
> > cpu9 at mainbus0: apid 9 (application processor)
> > cpu9: eax 0x00000009 ebx 0x00000104 ecx 0x00000000
> > cpu9: smt 0, core 9, package 0
> > cpu10 at mainbus0: apid 10 (application processor)
> > cpu10: eax 0x0000000a ebx 0x00000105 ecx 0x00000000
> > cpu10: smt 0, core 10, package 0
> > cpu11 at mainbus0: apid 11 (application processor)
> > cpu11: eax 0x0000000b ebx 0x00000105 ecx 0x00000000
> > cpu11: smt 0, core 11, package 0
> > cpu12 at mainbus0: apid 12 (application processor)
> > cpu12: eax 0x0000000c ebx 0x00000106 ecx 0x00000000
> > cpu12: smt 0, core 12, package 0
> > cpu13 at mainbus0: apid 13 (application processor)
> > cpu13: eax 0x0000000d ebx 0x00000106 ecx 0x00000000
> > cpu13: smt 0, core 13, package 0
> > cpu14 at mainbus0: apid 14 (application processor)
> > cpu14: eax 0x0000000e ebx 0x00000107 ecx 0x00000000
> > cpu14: smt 0, core 14, package 0
> > cpu15 at mainbus0: apid 15 (application processor)
> > cpu15: eax 0x0000000f ebx 0x00000107 ecx 0x00000000
> > cpu15: smt 0, core 15, package 0
The reacharound is a bit ugly, but would something like this do the trick?
I don't have a suitable AMD to test, but have tested the mechanism on an
i7 with HT and it does what's expected.
Index: identcpu.c
===================================================================
RCS file: /cvs/src/sys/arch/amd64/amd64/identcpu.c,v
retrieving revision 1.96
diff -u -p -r1.96 identcpu.c
--- identcpu.c 7 Jun 2018 04:07:28 -0000 1.96
+++ identcpu.c 20 Jun 2018 09:26:08 -0000
@@ -792,17 +792,32 @@ cpu_topology(struct cpu_info *ci)
if (ci->ci_pnfeatset < 0x80000008)
goto no_topology;
- CPUID(0x80000008, eax, ebx, ecx, edx);
- core_bits = (ecx >> 12) & 0xf;
- if (core_bits == 0)
- goto no_topology;
- /* So coreidsize 2 gives 3, 3 gives 7... */
- core_mask = (1 << core_bits) - 1;
- /* Core id is the least significant considering mask */
- ci->ci_core_id = apicid & core_mask;
- /* Pkg id is the upper remaining bits */
- ci->ci_pkg_id = apicid & ~core_mask;
- ci->ci_pkg_id >>= core_bits;
+ if (ci->ci_pnfeatset >= 0x8000001e) {
+ struct cpu_info *ci_other;
+ CPU_INFO_ITERATOR cii;
+
+ CPUID(0x8000001e, eax, ebx, ecx, edx);
+ ci->ci_core_id = ebx & 0xff;
+ ci->ci_pkg_id = ecx & 0xff;
+ ci->ci_smt_id = 0;
+ CPU_INFO_FOREACH(cii, ci_other) {
+ if (ci != ci_other &&
+ ci_other->ci_core_id == ci->ci_core_id)
+ ci->ci_smt_id++;
+ }
+ } else {
+ CPUID(0x80000008, eax, ebx, ecx, edx);
+ core_bits = (ecx >> 12) & 0xf;
+ if (core_bits == 0)
+ goto no_topology;
+ /* So coreidsize 2 gives 3, 3 gives 7... */
+ core_mask = (1 << core_bits) - 1;
+ /* Core id is the least significant considering mask */
+ ci->ci_core_id = apicid & core_mask;
+ /* Pkg id is the upper remaining bits */
+ ci->ci_pkg_id = apicid & ~core_mask;
+ ci->ci_pkg_id >>= core_bits;
+ }
} else if (strcmp(cpu_vendor, "GenuineIntel") == 0) {
/* We only support leaf 1/4 detection */
if (cpuid_level < 4)
