It seems that ARM SoC every vendor invents their own _HID/_CID for the
their AHCI implementation. Instead of adding all of these to an ever
growing list, we can match on _CLS instead which return the "PCI"
class/subclass/interface that the device is compatible with.
This adds a define to pcireg.h for the AHCI interface. The name is
aligned with NetBSD.
ok?
Index: dev/acpi/acpi.c
===================================================================
RCS file: /cvs/src/sys/dev/acpi/acpi.c,v
retrieving revision 1.355
diff -u -p -r1.355 acpi.c
--- dev/acpi/acpi.c 10 Jul 2018 17:11:42 -0000 1.355
+++ dev/acpi/acpi.c 30 Jul 2018 16:19:26 -0000
@@ -123,9 +123,6 @@ void acpi_create_thread(void *);
void acpi_indicator(struct acpi_softc *, int);
-int acpi_matchhids(struct acpi_attach_args *aa, const char *hids[],
- const char *driver);
-
void acpi_init_pm(struct acpi_softc *);
int acpi_founddock(struct aml_node *, void *);
@@ -505,6 +502,33 @@ acpi_getminbus(int crsidx, union acpi_re
*bbn = crs->lr_word._min;
}
return 0;
+}
+
+int
+acpi_matchcls(struct acpi_attach_args *aaa, int class, int subclass,
+ int interface)
+{
+ struct acpi_softc *sc = acpi_softc;
+ struct aml_value res;
+
+ if (aaa->aaa_dev == NULL || aaa->aaa_node == NULL)
+ return (0);
+
+ if (aml_evalname(sc, aaa->aaa_node, "_CLS", 0, NULL, &res))
+ return (0);
+
+ if (res.type != AML_OBJTYPE_PACKAGE || res.length != 3 ||
+ res.v_package[0]->type != AML_OBJTYPE_INTEGER ||
+ res.v_package[1]->type != AML_OBJTYPE_INTEGER ||
+ res.v_package[2]->type != AML_OBJTYPE_INTEGER)
+ return (0);
+
+ if (res.v_package[0]->v_integer == class &&
+ res.v_package[1]->v_integer == subclass &&
+ res.v_package[2]->v_integer == interface)
+ return (1);
+
+ return (0);
}
int
Index: dev/acpi/acpivar.h
===================================================================
RCS file: /cvs/src/sys/dev/acpi/acpivar.h,v
retrieving revision 1.96
diff -u -p -r1.96 acpivar.h
--- dev/acpi/acpivar.h 10 Jul 2018 17:11:42 -0000 1.96
+++ dev/acpi/acpivar.h 30 Jul 2018 16:19:26 -0000
@@ -366,6 +366,7 @@ void acpi_write_pmreg(struct acpi_softc
void acpi_poll(void *);
void acpi_sleep(int, char *);
+int acpi_matchcls(struct acpi_attach_args *, int, int, int);
int acpi_matchhids(struct acpi_attach_args *, const char *[], const char *);
int acpi_parsehid(struct aml_node *, void *, char *, char *, size_t);
Index: dev/acpi/ahci_acpi.c
===================================================================
RCS file: /cvs/src/sys/dev/acpi/ahci_acpi.c,v
retrieving revision 1.1
diff -u -p -r1.1 ahci_acpi.c
--- dev/acpi/ahci_acpi.c 1 Jul 2018 15:54:59 -0000 1.1
+++ dev/acpi/ahci_acpi.c 30 Jul 2018 16:19:26 -0000
@@ -49,21 +49,15 @@ struct cfattach ahci_acpi_ca = {
sizeof(struct ahci_acpi_softc), ahci_acpi_match, ahci_acpi_attach
};
-const char *ahci_hids[] = {
- "AMDI0600",
- "LNRO001E",
- NULL
-};
-
int ahci_acpi_parse_resources(int, union acpi_resource *, void *);
int
ahci_acpi_match(struct device *parent, void *match, void *aux)
{
struct acpi_attach_args *aaa = aux;
- struct cfdata *cf = match;
- return acpi_matchhids(aaa, ahci_hids, cf->cf_driver->cd_name);
+ return acpi_matchcls(aaa, PCI_CLASS_MASS_STORAGE,
+ PCI_SUBCLASS_MASS_STORAGE_SATA, PCI_INTERFACE_SATA_AHCI10);
}
void
Index: dev/pci/ahci_pci.c
===================================================================
RCS file: /cvs/src/sys/dev/pci/ahci_pci.c,v
retrieving revision 1.14
diff -u -p -r1.14 ahci_pci.c
--- dev/pci/ahci_pci.c 3 Jan 2018 20:10:40 -0000 1.14
+++ dev/pci/ahci_pci.c 30 Jul 2018 16:19:27 -0000
@@ -43,7 +43,6 @@
#define AHCI_PCI_BAR 0x24
#define AHCI_PCI_ATI_SB600_MAGIC 0x40
#define AHCI_PCI_ATI_SB600_LOCKED 0x01
-#define AHCI_PCI_INTERFACE 0x01
struct ahci_pci_softc {
struct ahci_softc psc_ahci;
@@ -232,7 +231,7 @@ ahci_ati_sb_idetoahci(struct ahci_softc
pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_CLASS_REG,
PCI_CLASS_MASS_STORAGE << PCI_CLASS_SHIFT |
PCI_SUBCLASS_MASS_STORAGE_SATA << PCI_SUBCLASS_SHIFT |
- AHCI_PCI_INTERFACE << PCI_INTERFACE_SHIFT |
+ PCI_INTERFACE_SATA_AHCI10 << PCI_INTERFACE_SHIFT |
PCI_REVISION(pa->pa_class) << PCI_REVISION_SHIFT);
pci_conf_write(pa->pa_pc, pa->pa_tag,
@@ -310,7 +309,7 @@ ahci_pci_match(struct device *parent, vo
if (PCI_CLASS(pa->pa_class) == PCI_CLASS_MASS_STORAGE &&
PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_MASS_STORAGE_SATA &&
- PCI_INTERFACE(pa->pa_class) == AHCI_PCI_INTERFACE)
+ PCI_INTERFACE(pa->pa_class) == PCI_INTERFACE_SATA_AHCI10)
return (2);
return (0);
Index: dev/pci/pcireg.h
===================================================================
RCS file: /cvs/src/sys/dev/pci/pcireg.h,v
retrieving revision 1.55
diff -u -p -r1.55 pcireg.h
--- dev/pci/pcireg.h 9 Aug 2017 21:42:44 -0000 1.55
+++ dev/pci/pcireg.h 30 Jul 2018 16:19:27 -0000
@@ -168,6 +168,7 @@ typedef u_int8_t pci_revision_t;
#define PCI_SUBCLASS_MASS_STORAGE_RAID 0x04
#define PCI_SUBCLASS_MASS_STORAGE_ATA 0x05
#define PCI_SUBCLASS_MASS_STORAGE_SATA 0x06
+#define PCI_INTERFACE_SATA_AHCI10 0x01
#define PCI_SUBCLASS_MASS_STORAGE_SAS 0x07
#define PCI_SUBCLASS_MASS_STORAGE_NVM 0x08
#define PCI_SUBCLASS_MASS_STORAGE_UFS 0x09
