On Tue, Nov 6, 2018 at 9:51 PM Joseph Mayer <joseph.ma...@protonmail.com> wrote:
> Previously there was a years-long thread about a 4GB (32bit) buffer > cache constraint on AMD64, ref > https://marc.info/?t=146824436600004&r=1&w=2 . > > What I gather is, > > * The problematique is that on AMD64, DMA is limited to 32bit > addressing, I guess because unlike AMD64 arch CPU:s which all have > 64bit DMA support, popular PCI accessories and supporting hardware > out there like bridges, have DMA functionality limited to 32bit > addressing. > My read of that thread, particularly Theo's comments, is that no one actually demonstrated a case where lack of 64bit DMA caused any problems or limitations. If you have a system and use where lack of 64bit DMA creates a performance limitation, then describe it and, *more importantly*, *why* you think the DMA limit is involved. Philip Guenther
